[Qemu-devel] [PATCH] sh4: r2d. Endian conversion for peripheral register initialization.

[takasi-y]

Add endian conversion to hw/r2d.c which lacks consideration of endian on
setting BSC registers.

Signed-off-by: Takashi YOSHII <address@hidden>
---

Ah, thank you for pointed it out.
> > +      cpu_physical_memory_write(SH7750_BCR1_A7,&bcr1,4);
> > +      cpu_physical_memory_write(SH7750_BCR2_A7,&bcr2,2);
> 
> I pushed this patch but it looks like there may be an endianness problem here.
I found what I wanted might be stl_phys/stw_phys.

This time I set up big endian target system, and tested both endian.
But, I still in trouble setting up big endian host.
Because I don't have real HW here, I tried qemu sparc, mipsel and ppc,
 but none of them are successful, so far.
Could someone tell me which arch is recommended for testing host ?

Cheers,
/yoshii

---
 hw/r2d.c |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/hw/r2d.c b/hw/r2d.c
index 5d5eb1e..b3aa6e9 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -238,10 +238,8 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
     {
       int kernel_size;
       /* initialization which should be done by firmware */
-      uint32_t bcr1 = 1 << 3; /* cs3 SDRAM */
-      uint16_t bcr2 = 3 << (3 * 2); /* cs3 32-bit */
-      cpu_physical_memory_write(SH7750_BCR1_A7, (uint8_t *)&bcr1, 4);
-      cpu_physical_memory_write(SH7750_BCR2_A7, (uint8_t *)&bcr2, 2);
+      stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */
+      stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */
 
       kernel_size = load_image(kernel_filename, phys_ram_base);
 
-- 
1.5.6.3