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[Qemu-devel] [6053] target-ppc: fmadd/fmsub/fmnadd/ fmnsub can generate


From: Aurelien Jarno
Subject: [Qemu-devel] [6053] target-ppc: fmadd/fmsub/fmnadd/ fmnsub can generate VXIMZ or VXIZI exceptions
Date: Mon, 15 Dec 2008 17:14:43 +0000

Revision: 6053
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6053
Author:   aurel32
Date:     2008-12-15 17:14:43 +0000 (Mon, 15 Dec 2008)

Log Message:
-----------
target-ppc: fmadd/fmsub/fmnadd/fmnsub can generate VXIMZ or VXIZI exceptions

Signed-off-by: Aurelien Jarno <address@hidden>

Modified Paths:
--------------
    trunk/target-ppc/op_helper.c

Modified: trunk/target-ppc/op_helper.c
===================================================================
--- trunk/target-ppc/op_helper.c        2008-12-15 17:14:35 UTC (rev 6052)
+++ trunk/target-ppc/op_helper.c        2008-12-15 17:14:43 UTC (rev 6053)
@@ -1295,6 +1295,10 @@
                  float64_is_signaling_nan(farg3.d))) {
         /* sNaN operation */
         farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
+    } else if (unlikely((float64_is_infinity(farg1.d) && 
float64_is_zero(farg2.d)) ||
+                        (float64_is_zero(farg1.d) && 
float64_is_infinity(farg2.d)))) {
+        /* Multiplication of zero by infinity */
+        farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
     } else {
 #ifdef FLOAT128
         /* This is the way the PowerPC specification defines it */
@@ -1303,9 +1307,15 @@
         ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
         ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
         ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
-        ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
-        ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
-        farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        if (unlikely(float128_is_infinity(ft0_128) && 
float64_is_infinity(farg3.d) &&
+                     float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) {
+            /* Magnitude subtraction of infinities */
+            farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
+        } else {
+            ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
+            ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
+            farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        }
 #else
         /* This is OK on x86 hosts */
         farg1.d = (farg1.d * farg2.d) + farg3.d;
@@ -1332,6 +1342,10 @@
                  float64_is_signaling_nan(farg3.d))) {
         /* sNaN operation */
         farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
+    } else if (unlikely((float64_is_infinity(farg1.d) && 
float64_is_zero(farg2.d)) ||
+                        (float64_is_zero(farg1.d) && 
float64_is_infinity(farg2.d)))) {
+        /* Multiplication of zero by infinity */
+        farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
     } else {
 #ifdef FLOAT128
         /* This is the way the PowerPC specification defines it */
@@ -1340,9 +1354,15 @@
         ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
         ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
         ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
-        ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
-        ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
-        farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        if (unlikely(float128_is_infinity(ft0_128) && 
float64_is_infinity(farg3.d) &&
+                     float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) {
+            /* Magnitude subtraction of infinities */
+            farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
+        } else {
+            ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
+            ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
+            farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        }
 #else
         /* This is OK on x86 hosts */
         farg1.d = (farg1.d * farg2.d) - farg3.d;
@@ -1369,6 +1389,10 @@
                  float64_is_signaling_nan(farg3.d))) {
         /* sNaN operation */
         farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
+    } else if (unlikely((float64_is_infinity(farg1.d) && 
float64_is_zero(farg2.d)) ||
+                        (float64_is_zero(farg1.d) && 
float64_is_infinity(farg2.d)))) {
+        /* Multiplication of zero by infinity */
+        farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
     } else {
 #if USE_PRECISE_EMULATION
 #ifdef FLOAT128
@@ -1378,9 +1402,15 @@
         ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
         ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
         ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
-        ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
-        ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
-        farg1.d= float128_to_float64(ft0_128, &env->fp_status);
+        if (unlikely(float128_is_infinity(ft0_128) && 
float64_is_infinity(farg3.d) &&
+                     float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) {
+            /* Magnitude subtraction of infinities */
+            farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
+        } else {
+            ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
+            ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
+            farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        }
 #else
         /* This is OK on x86 hosts */
         farg1.d = (farg1.d * farg2.d) + farg3.d;
@@ -1409,6 +1439,10 @@
                  float64_is_signaling_nan(farg3.d))) {
         /* sNaN operation */
         farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
+    } else if (unlikely((float64_is_infinity(farg1.d) && 
float64_is_zero(farg2.d)) ||
+                        (float64_is_zero(farg1.d) && 
float64_is_infinity(farg2.d)))) {
+        /* Multiplication of zero by infinity */
+        farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
     } else {
 #if USE_PRECISE_EMULATION
 #ifdef FLOAT128
@@ -1418,9 +1452,15 @@
         ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
         ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
         ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
-        ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
-        ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
-        farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        if (unlikely(float128_is_infinity(ft0_128) && 
float64_is_infinity(farg3.d) &&
+                     float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) {
+            /* Magnitude subtraction of infinities */
+            farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
+        } else {
+            ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
+            ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
+            farg1.d = float128_to_float64(ft0_128, &env->fp_status);
+        }
 #else
         /* This is OK on x86 hosts */
         farg1.d = (farg1.d * farg2.d) - farg3.d;






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