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Re: [Qemu-devel] [PATCH] TSC2005 interrupt handling fix

From: Riihimaki Juha (Nokia-D-MSW/Helsinki)
Subject: Re: [Qemu-devel] [PATCH] TSC2005 interrupt handling fix
Date: Thu, 8 Jan 2009 12:44:10 +0200

On Jan 8, 2009, at 09:27, ext andrzej zaborowski wrote:

For issue #1 specifically, when this happens with the current version, all DAV bits for the running conversion function are set by the timer tick callback even if some of the results had already been read out and the corresponding DAV bits cleared. Now, when the guest ISR is finished and it clears the IRQ, some DAV bits in the TSC2005 will remain set and this leads to the TSC2005 never to raise a new interrupt again (at least with function
1 in use).

The ISR doesn't clear the IRQ -- it can only clear the irq mask flag.
If the TSC2005 still keeps the IRQ pin high, then the cpu should
immediately jump to the ISR again.

True; in the scenario I used for testing PINTDAV is programmed as DAV (CFR2 bit 14 is set) and thus the ISR tries to deassert the interrupt condition at the TSC2005 by reading all conversion results. It is of course the TSC2005 itself that needs to actually clear the interrupt. However in the condition I described above, the ISR will not try to read new conversion results from the TSC2005 if the interrupt has not been cleared in between -- which will not happen if some of the DAV bits stay set. This is how it looks like from the TSC2005's viewpoint, I have not read the ISR code. Neither have I checked whether the problem is that the ISR is not executed at all or if it for some reason just refuses to talk with the TSC2005.

We shouldn't be trying to change the tsc2005 emulation so that the
driver works, we should change it so that it behaves as described in
the specification from TI.  I think the real issue is that we start a
new conversion before the irq is deasserted, i.e. the following check
in tscXXXX_pin_update

   if (!s->enabled || s->busy)

should become

   if (!s->enabled || s->busy || s->dav)

or something similar.  It would be good to check on the real tsc2005
when exactly the DAC becomes busy (bit 14 of CFR0) in the different

My original change to overcame this was also a small change; I only changed the setting of the DAV bits in the timer callback function to set the bits only if the bits for the current function were all clear. That had similar effect to the change you are proposing here however issue #2 remains still. Perhaps it's just my eyes but I did not find any information on TI's spec on the exact timing of the interrupt line, for example the time between reading the last available data value and when the interrupt is cleared and how quickly after that the interrupt line can be raised again.


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