qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 7/7] PPC64: Don't fault at lwsync


From: Daniel Jacobowitz
Subject: Re: [Qemu-devel] [PATCH 7/7] PPC64: Don't fault at lwsync
Date: Thu, 5 Mar 2009 14:42:22 -0500
User-agent: Mutt/1.5.17 (2008-05-11)

On Thu, Mar 05, 2009 at 04:44:30PM +0000, Paul Brook wrote:
> When an MMU exception occurs, qemu figures out the guest location from the 
> location of the MMU access in guest code (see cpu_restore_state). My guess is 
> that this breaks when two guest instructions have the same location. I'm not 
> entirely sure what the correct fix is, or where the bug lies 
> (cpu_restore_state,  gen_intermediate_code_pc, or tcg_gen_code_search_pc) but 
> hopefully this will point you in the right direction.

Automatically pick the second instruction, on the principle that an
instruction with no opcodes is unlikely to trigger a synchronous
fault?

-- 
Daniel Jacobowitz
CodeSourcery




reply via email to

[Prev in Thread] Current Thread [Next in Thread]