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[Qemu-devel] [6769] Fix off-by-one errors for Altivec and SPE registers
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [6769] Fix off-by-one errors for Altivec and SPE registers |
Date: |
Sat, 07 Mar 2009 22:00:49 +0000 |
Revision: 6769
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6769
Author: aurel32
Date: 2009-03-07 22:00:49 +0000 (Sat, 07 Mar 2009)
Log Message:
-----------
Fix off-by-one errors for Altivec and SPE registers
Altivec and SPE both have 34 registers in their register sets, not 35
with a missing register 32.
GDB would ask for register 32 of the Altivec (resp. SPE) registers and
the code would claim it had zero width. The QEMU GDB stub code would
then return an E14 to GDB, which would complain about not being sure
whether p packets were supported or not.
Signed-off-by: Nathan Froyd <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Modified Paths:
--------------
trunk/target-ppc/translate_init.c
Modified: trunk/target-ppc/translate_init.c
===================================================================
--- trunk/target-ppc/translate_init.c 2009-03-07 22:00:29 UTC (rev 6768)
+++ trunk/target-ppc/translate_init.c 2009-03-07 22:00:49 UTC (rev 6769)
@@ -9379,11 +9379,11 @@
#endif
return 16;
}
- if (n == 33) {
+ if (n == 32) {
stl_p(mem_buf, env->vscr);
return 4;
}
- if (n == 34) {
+ if (n == 33) {
stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]);
return 4;
}
@@ -9402,11 +9402,11 @@
#endif
return 16;
}
- if (n == 33) {
+ if (n == 32) {
env->vscr = ldl_p(mem_buf);
return 4;
}
- if (n == 34) {
+ if (n == 33) {
env->spr[SPR_VRSAVE] = (target_ulong)ldl_p(mem_buf);
return 4;
}
@@ -9423,11 +9423,11 @@
#endif
return 4;
}
- if (n == 33) {
+ if (n == 32) {
stq_p(mem_buf, env->spe_acc);
return 8;
}
- if (n == 34) {
+ if (n == 33) {
/* SPEFSCR not implemented */
memset(mem_buf, 0, 4);
return 4;
@@ -9447,11 +9447,11 @@
#endif
return 4;
}
- if (n == 33) {
+ if (n == 32) {
env->spe_acc = ldq_p(mem_buf);
return 8;
}
- if (n == 34) {
+ if (n == 33) {
/* SPEFSCR not implemented */
return 4;
}
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