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Re: [Qemu-devel] Next stable release
From: |
malc |
Subject: |
Re: [Qemu-devel] Next stable release |
Date: |
Fri, 10 Apr 2009 06:54:49 +0400 (MSD) |
On Thu, 9 Apr 2009, TeLeMan wrote:
>
>
> malc-4 wrote:
> >
> > On Mon, 6 Apr 2009, TeLeMan wrote:
> >
> >>
> >> I hope you can fix the following bugs in the next release:
> >>
> >> http://www.nabble.com/-PATCH--i386-hard-interrupt-generation-bug-fix-p14921171.html
> >> http://www.nabble.com/MAX_OP_PER_INSTR-should-be-larger-tt22573338.html
> >>
> >
> > You should retry with the current QEMU, immediate ro[lr]s should produce a
> > lot less tcg ops currently.
> >
> > --
> > mailto:address@hidden
> >
> >
> >
> >
>
> It is not fixed yet.
>
[..snip..]
Omitting dump before liveness analysis...
>
> ---- 0x4468c0
> ld_i32 loc24,env,$0x18
> nopn $0x3,$0x0,$0x3
> movi_i32 loc25,$0x0
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> movi_i32 tmp32,$0xe
> shl_i32 tmp30,loc25,tmp32
> nopn $0x2,$0x2
> nopn $0x3,$0x21,$0x3
> movi_i32 tmp32,$0x12
> shr_i32 tmp14,loc24,tmp32
> or_i32 tmp14,tmp14,tmp30
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x3,$0x20,$0x3
> movi_i32 tmp32,$0xe
> shl_i32 tmp30,loc24,tmp32
> nopn $0x2,$0x2
> nopn $0x3,$0x21,$0x3
> nopn $0x3,$0x21,$0x3
> mov_i32 loc24,tmp30
> or_i32 loc24,loc24,tmp14
> nopn $0x3,$0x21,$0x3
> st_i32 loc24,env,$0x18
> movi_i32 tmp8,$0x0
> nopn $0x2,$0x2
> st_i32 tmp8,env,$0x1c
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x6,$0x14,$0x1,$0x26,$0x10,$0x6
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x3,$0x2,$0x3
> nopn $0x3,$0x22,$0x3
> nopn $0x3,$0x23,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x11,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x11,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x10,$0x3
> nopn $0x3,$0x10,$0x3
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x3,$0x10,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x2,$0x3
> nopn $0x3,$0x3,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x21,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x21,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x20,$0x3
> nopn $0x3,$0x20,$0x3
> nopn $0x2,$0x2
> nopn $0x2,$0x2
> nopn $0x3,$0x20,$0x3
> nopn $0x2,$0x2
> nopn $0x3,$0x2,$0x3
> nopn $0x3,$0x3,$0x3
> discard cc_dst_0
> discard cc_dst_1
> nopn $0x2,$0x2
As you can see above most of the stuff was turned into nops by
la.. So...
[..snip..]
>
> 65 ops were translated at 0x4468c0 or 0x4468c3.
> 71 ops were translated at the last instruction(0x4468eb).
> Another question: Who can ensure no other instructions like this? just by
> testing?
>
--
mailto:address@hidden
Re: [Qemu-devel] Next stable release, Stefan Weil, 2009/04/06