[Qemu-devel] Re: [PATCH] Fix timer interrupt routing for non-ACPI guest

[Sebastian Herbszt]

Ed Swierk wrote:
> > > The interrupt routing table in the MPTABLE needs to route the timer
> > > interrupt (IRQ 0) to IOAPIC pin 2.
> >
> > Do you refer here to "5.3 Assigning of I/O Interrupts to the APIC I/O Unit"
> > from MultiProcessor Specification 1.4 or some other documentation?
>
> I confess I haven't checked actual documentation; instead I've
> referred to code from Coreboot that seems to work. For example the
> bus_isa interrupts at
> http://tracker.coreboot.org/trac/coreboot/browser/trunk/coreboot-v2/src/mainboard/msi/ms9185/mptable.c
> .

Looks like this sets:

ExtINT IRQ0 -> 0:0
INT IRQ1 -> 0:1
INT IRQ0 -> 0:2
INT IRQ3 -> 0:3

This seems to also be what VMware provides:

Int: type 3, pol 1, trig 1, bus 02, IRQ 00, APIC ID 1, APIC INT 00
Int: type 0, pol 1, trig 1, bus 02, IRQ 01, APIC ID 1, APIC INT 01
Int: type 0, pol 1, trig 1, bus 02, IRQ 00, APIC ID 1, APIC INT 02
Int: type 0, pol 1, trig 1, bus 02, IRQ 03, APIC ID 1, APIC INT 03
..TIMER: vector=0x31 apic1=0 pin1=2 apic2=0 pin2=0

> > ..TIMER: vector=0x31 apic1=0 pin1=2 apic2=-1 pin2=-1
> >
> > IRQ0 -> 0:2
> > IRQ1 -> 0:1
> > IRQ3 -> 0:3
>
> I suspect the latter is correct but I don't know that it really makes
> a difference, at least to Linux.

We can achieve this

Int: type 3, pol 0, trig 0, bus 00, IRQ 00, APIC ID 1, APIC INT 00
Int: type 0, pol 0, trig 0, bus 00, IRQ 00, APIC ID 1, APIC INT 02
Int: type 0, pol 0, trig 0, bus 00, IRQ 01, APIC ID 1, APIC INT 01
Int: type 0, pol 0, trig 0, bus 00, IRQ 03, APIC ID 1, APIC INT 03
..TIMER: vector=0x31 apic1=0 pin1=2 apic2=0 pin2=0

with the following patch.

- Sebastian

Index: bochs-cvs/bios/rombios32.c
===================================================================
--- bochs-cvs.orig/bios/rombios32.c
+++ bochs-cvs/bios/rombios32.c
@@ -1142,16 +1142,27 @@ static void mptable_init(void)
    putb(&q, 1); /* enable */
    putle32(&q, 0xfec00000); /* I/O APIC addr */

+    putb(&q, 3); /* entry type = I/O interrupt */
+    putb(&q, 3); /* interrupt type = ExtINT */
+    putb(&q, 0); /* flags: po=0, el=0 */
+    putb(&q, 0);
+    putb(&q, 0); /* source bus ID = ISA */
+    putb(&q, 0); /* source bus IRQ */
+    putb(&q, ioapic_id); /* dest I/O APIC ID */
+    putb(&q, 0); /* dest I/O APIC interrupt in */
+
    /* irqs */
    for(i = 0; i < 16; i++) {
+        if (i == 2)
+            continue;
        putb(&q, 3); /* entry type = I/O interrupt */
        putb(&q, 0); /* interrupt type = vectored interrupt */
        putb(&q, 0); /* flags: po=0, el=0 */
        putb(&q, 0);
        putb(&q, 0); /* source bus ID = ISA */
-        putb(&q, (i == 2) ? 0 : i); /* source bus IRQ */
+        putb(&q, i); /* source bus IRQ */
        putb(&q, ioapic_id); /* dest I/O APIC ID */
-        putb(&q, i); /* dest I/O APIC interrupt in */
+        putb(&q, (i == 0) ? 2 : i); /* dest I/O APIC interrupt in */
    }
    /* patch length */
    len = q - mp_config_table;