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[Qemu-devel] [PATCH 5/9] implement specialized nand_i{32,64}


From: Nathan Froyd
Subject: [Qemu-devel] [PATCH 5/9] implement specialized nand_i{32,64}
Date: Tue, 21 Apr 2009 18:12:13 -0700

Signed-off-by: Nathan Froyd <address@hidden>
---
 tcg/tcg-op.h |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 543d1b6..13c0967 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1625,14 +1625,25 @@ static inline void tcg_gen_eqv_i64(TCGv_i64 ret, 
TCGv_i64 arg1, TCGv_i64 arg2)
 
 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 {
+#ifdef TCG_TARGET_HAS_nand_i32
+    tcg_gen_op3_i32(INDEX_op_nand_i32, ret, arg1, arg2);
+#else
     tcg_gen_and_i32(ret, arg1, arg2);
     tcg_gen_not_i32(ret, ret);
+#endif
 }
 
 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 {
+#ifdef TCG_TARGET_HAS_nand_i64
+    tcg_gen_op3_i64(INDEX_op_nand_i64, ret, arg1, arg2);
+#elif defined(TCG_TARGET_HAS_nand_i32) && TCG_TARGET_REG_BITS == 32
+    tcg_gen_nand_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
+    tcg_gen_nand_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+#else
     tcg_gen_and_i64(ret, arg1, arg2);
     tcg_gen_not_i64(ret, ret);
+#endif
 }
 
 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
-- 
1.6.0.5





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