4. Still there, there's some handling done for type 1 devices.
This support seems imcomplete.
Are there any PCI-to-PCI bridges emulated by qemu?
Would it make sense to remove this code?
It did work at one point:
http://www.mail-archive.com/address@hidden/msg16647.html
Sigh. I guess I'll have to fix it rather than just rip it out then ...
What I refer to first of all is that writes to BAR registers go through
logic for regular PCI devices, which have a different layout.
Does this make sense for some reason?