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[Qemu-devel] [patch 1/1] target-ppc/translate.c: don't generate debug ex
From: |
Baojun Wang |
Subject: |
[Qemu-devel] [patch 1/1] target-ppc/translate.c: don't generate debug exception in single step mode for RFI |
Date: |
Fri, 24 Jul 2009 21:03:19 +0800 |
hi, list
This is another ppc translate tiny fix. we need inhibit generate
debug exeception in single step mode when doing a RFI. RFI enforce
context synchronization, if we generate a debug exception, then the
next instruction executed will be the instruction right after RFI,
instead of instruction in SRR0.
We can set a break point at linux assembly function
``transfer_to_handler_cont'', and then do single step, and in this way
we will trigger the regression. I don't know if other architecture
have the same problem, but I'm not familiar with other architecture
(especially in qemu).
Best Regards,
Wang Baojun
signed-off-by: Baojun Wang <address@hidden>
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index da3d7de..29276f7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -9057,7 +9057,8 @@ static always_inline void
gen_intermediate_code_internal (CPUState *env,
gen_goto_tb(&ctx, 0, ctx.nip);
} else if (ctx.exception != POWERPC_EXCP_BRANCH) {
if (unlikely(env->singlestep_enabled)) {
- gen_debug_exception(ctxp);
+ if(likely(ctx.exception != POWERPC_EXCP_SYNC))
+ gen_debug_exception(ctxp);
}
/* Generate the return instruction */
tcg_gen_exit_tb(0);
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