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Re: [Qemu-devel] sparc sun4m changes

From: Robert Reif
Subject: Re: [Qemu-devel] sparc sun4m changes
Date: Sun, 09 Aug 2009 22:28:04 -0400
User-agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv: Gecko/20090303 SeaMonkey/1.1.15 (Ubuntu-1.1.15+nobinonly-0ubuntu2)

Robert Reif wrote:
I just took a look at the sun4m interrupt controller and noticed
the recent changes.  There are at least 3 different interrupt
controllers used by sun4m: ss600mp with VME and MBUS
specific support, ss 10/20 with MBUS support and ss 4/5/lx
with slavio support.  This doesn't even address the java stations.

intbit_to_level in slavio_intctrl.c needs to be different for each
controller chip used.  There also needs to be a controller specific
interrupt mask used.

The NCR slavio chip is only used for single processor systems
(ss 4/5/lx).  It is a subset of the ss 10/20 which is a subset of the
ss600mp.  We really should address these differences.

I forgot to mention the ss 10/20 uses an STP 2014 SBus to EBus
Interface Controller.  I have a paper copy of the User's Guide.  I
can have it scanned to a pdf if necessary.

The ss600mp uses ASICs with no documentation other than
the sun4m System Architecture manual and SPARCsystem 600MP
VMEbus Implementation Guide on:

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