[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 1/2] Route PC irqs to ISA bus instead of i8259 d
Re: [Qemu-devel] [PATCH 1/2] Route PC irqs to ISA bus instead of i8259 directly
Mon, 10 Aug 2009 11:45:07 +0200
Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1b3pre) Gecko/20090513 Fedora/3.0-2.3.beta2.fc11 Thunderbird/3.0b2
On 10.08.2009 11:04, Alexander Graf wrote:
Am 09.08.2009 um 18:44 schrieb Avi Kivity <address@hidden>:
A PC has its motherboard IRQ lines connected to both the PIC and IOAPIC.
Currently, qemu routes IRQs to the PIC which then calls the IOAPIC, an
incestuous arrangement. In order to clean this up, create a new ISA IRQ
abstraction, and have devices raise ISA IRQs (which in turn raise the
IRQs as usual).
Is this really true? From my understanding the PIC in modern systems is
emulated through the IOAPIC, which is the reason we have legacy interrupts.
While not sure how the hardware implementation is done in detail I can
confirm that the IRQs indeed end up at both PIC and IO-APIC0 if the
device is connected to the southbridge directly. If that's not the case
for example a PCI bus connected via PCIe that sports it's own IO-APIC
then IRQs are forwarded (over PCIe) from the IO-APIC to the southbridge
In any case, to come closer to the real hardware having an abstraction
that receives IRQs from devices and delivers them to the appropriate
interrupt controller(s) seems to be a valid step IMHO.
Does qemu support multiple IO-APICs? I guess not so no need for boot
interrupts. (If yes then there would be the question how close you
really want to be to existing hardware.)
Stefan Assmann | Red Hat GmbH
Software Engineer | Otto-Hahn-Strasse 20, 85609 Dornach
| HR: Amtsgericht Muenchen HRB 153243
| GF: Brendan Lane, Charlie Peters,
sassmann at redhat.com | Michael Cunningham, Charles Cachera
[Qemu-devel] [PATCH 1/2] Route PC irqs to ISA bus instead of i8259 directly, Avi Kivity, 2009/08/09