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Re: [Qemu-devel] [PATCH 2/2] Route IOAPIC interrupts via ISA bus

From: Gleb Natapov
Subject: Re: [Qemu-devel] [PATCH 2/2] Route IOAPIC interrupts via ISA bus
Date: Thu, 27 Aug 2009 10:57:28 +0300

On Thu, Aug 27, 2009 at 09:40:06AM +0200, Gerd Hoffmann wrote:
> On 08/26/09 21:09, Gleb Natapov wrote:
> >On Wed, Aug 26, 2009 at 06:30:54PM +0200, Gerd Hoffmann wrote:
> >>Right now we have IRQs 5,10,11 for PCI.  Having one more IRQ (so we
> >>have one for each link) would be useful IMHO.  eight links + eight
> >>irqs would be even more useful.  What needs to be done for that?
> >>
> >Current code uses piix3 irq router to route pci interrupts to pic _and_
> >ioapic and piix3 irq router supports only 16 interrupts.
> That means?  We could add four more PCI links which have IRQs routed
That means changing acpi/bios is unfortunately not enough.

> through another IRQ router chip and link them to ioapic lines 17-23
> that way? 
Something like that. We can invent our own irq router and write driver
for it in DSDT.

>            Or does it mean we must emulate a more recent chipset?
That too will work.


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