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[Qemu-devel] [PATCH v2 00/21] cpuid: cleanup, fixes and some enhancement

From: Andre Przywara
Subject: [Qemu-devel] [PATCH v2 00/21] cpuid: cleanup, fixes and some enhancements
Date: Fri, 18 Sep 2009 13:47:53 +0200


an updated version of my last week's series.
Changes from v1 -> v2:
- fix build for non-i386 targets (thanks Anthony for spotting this)
- replace strtok() with QEMU's get_opt_name() (inspired by Amit Shah)
  (please see the notes below)
- fix multicore setup on Intel (thanks Dietmar Maurer for spotting this)
- removed unnecessary header file inclusions from cpuid.c
- fix and add various CPU models
- add kvm32 CPU model (for 32bit only migration)
- always expose all CPU models (regardless of the bitness)

The following patchset cleans up CPUID bit handling and adds some smaller
The most prominent change is to move all CPUID related functions to a
separate file. About 40% of helper.c was actually CPUID related, so say
hello to cpuid.c. While at it, I fixed some formatting issues. (Patch 1-5)
Patch 6 replaces the awkward strtok() with the better get_opt_name().
  Please note: This renders the gotos useless. Shall they be removed?
  Second note: I pulled get_opt_name() from qemu-option.h into the file,
  because it did not work with linux-user due to a name clash:
  linux-user/mmap.c:qemu_malloc() and qemu-malloc.c:qemu_malloc()
  If anyone has a better solution, I am all ears.
Patch 7 & 8 add the CPUID feature flag names to the output of -cpu ?.
Patch 9 & 10 simplifies some code.
Patch 11 allows more CPUID leafs to be propagated to guests when -cpu host
is used, this should now reflect the host CPU's cache size.
Patch 12 fixes a bug with the multicore injection to the guest, where
the Linux kernel on Intel hosts would not recognize multiple cores.
Patch 13 adds a trimming feature (similar to KVM) to QEMU/TCG. The goal
is to describe CPU models more precisely by reflecting the feature bits of
the real hardware. Features that QEMU does not support are then masked.
If we add features to QEMU, we only need to adjust it in one location.
Patch 14 adjusts the size of the L2 cache described by leaf 4 to a more
conservative value of one megabyte. This prevents guests assuming too large
caches if they use optimized algorithms.
Patch 15-19 changes the CPU models to describe the actual CPUID bits
of the real silicon (checked with actual machines, x86info examples and
datasheets). Unsupported features will be masked.
Patch 20 adds a kvm32 CPU model, which is useful for migration.
Patch 21 finally exposes both the 32- and 64-bit CPU model also to QEMU32,
since the LM bit will be masked out.

Please review, comment and apply!
Thanks and Regards,

Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
Tel: +49 351 448 3567 12
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