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[Qemu-devel] [PATCH 00/13] Alpha emulation improvements, round two


From: Richard Henderson
Subject: [Qemu-devel] [PATCH 00/13] Alpha emulation improvements, round two
Date: Fri, 11 Dec 2009 17:13:34 -0800

There are two -d flags fixes herein, which helps with the rest.
Otherwise the improvements are in 3 categories:

(1) Implement the rd/wrunique PALcall in the translator, at least for
    usermode.  There's no reason to break the TB for a register move.

(2) Implement the byte manipulation instructions inline instead of 
    via helpers.  Worst case these expand to about 6 tcg ops.  I was
    hoping without looking that tcg would do some simple CSE operations
    within the block.  Of course, cse isn't implemented yet, but there's
    no reason that couldn't happen in the future.

    A good test case for the cse might be
    gcc.c-torture/execute/20040709-2.c, function retmeE:

        120001964:   0f 00 50 2c     ldq_u   t1,15(a0)
        120001968:   00 00 30 2c     ldq_u   t0,0(a0)
        12000196c:   e4 0e 50 4a     insqh   a2,a0,t3
        120001970:   72 07 50 4a     insql   a2,a0,a2
        120001974:   e3 0e 30 4a     insqh   a1,a0,t2
        120001978:   71 07 30 4a     insql   a1,a0,a1
        12000197c:   03 04 72 44     or      t2,a2,t2
        120001980:   42 0e 50 48     mskqh   t1,a0,t1
        120001984:   41 06 30 48     mskql   t0,a0,t0
        120001988:   02 04 44 44     or      t1,t3,t1
        12000198c:   01 04 31 44     or      t0,a1,t0
        120001990:   0f 00 50 3c     stq_u   t1,15(a0)
        120001994:   08 00 70 3c     stq_u   t2,8(a0)
        120001998:   00 00 30 3c     stq_u   t0,0(a0)

    Here we've got 6 byte manipulation insns using A0 as an input,
    all of which compute at least (A0 & 7) * 8; there's even more
    that could be shared in this block.

(3) There are three FP correctness fixes.

Not surprisingly from the last, there are now fewer gcc testsuite
failures.  I suspect that I'll have to tackle the missing rounding
mode bits before the rest of the testsuite will work.


r~


Richard Henderson (13):
  alpha: Implement missing MVI instructions.
  alpha: Fix -d in_asm
  alpha: Expand zap/zapnot with immediate inline.
  alpha: Rewrite gen_ext_[hl] in terms of zapnot.
  alpha: Fix fbcond branch offset.
  alpha: Implement RD/WRUNIQUE in the translator
  alpha: Expand ins*l inline.
  alpha: Expand msk*l inline.
  alpha: Expand msk*h inline.
  alpha: Expand ins*h inline.
  alpha: Fix FMOV.
  alpha: Fix double log_cpu_state.
  alpha: Implement fp branch/cmov inline.

 hw/alpha_palcode.c       |   11 +-
 target-alpha/helper.h    |   35 +--
 target-alpha/op_helper.c |  228 ++++++++++------
 target-alpha/translate.c |  645 +++++++++++++++++++++++++++++++---------------
 4 files changed, 600 insertions(+), 319 deletions(-)




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