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Re: [Qemu-devel] [PATCH 5/9] sparc64: add macros to deal with softint an
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH 5/9] sparc64: add macros to deal with softint and timer interrupt |
Date: |
Wed, 6 Jan 2010 15:58:16 +0000 |
On Tue, Jan 5, 2010 at 11:19 PM, Igor V. Kovalenko
<address@hidden> wrote:
> From: Igor V. Kovalenko <address@hidden>
>
> Signed-off-by: Igor V. Kovalenko <address@hidden>
> ---
> target-sparc/cpu.h | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
> index 1fe4d0f..0dba241 100644
> --- a/target-sparc/cpu.h
> +++ b/target-sparc/cpu.h
> @@ -394,6 +394,8 @@ typedef struct CPUSPARCState {
> uint64_t fprs;
> uint64_t tick_cmpr, stick_cmpr;
> void *tick, *stick;
> +#define TICK_NPT_MASK 0x8000000000000000ULL
> +#define TICK_SOFTINT_DISABLE 0x8000000000000000ULL
Please move the TICK_NPT and TICK_INT_DIS macros from sun4u.c to here.
> uint64_t gsr;
> uint32_t gl; // UA2005
> /* UA 2005 hyperprivileged registers */
> @@ -402,6 +404,10 @@ typedef struct CPUSPARCState {
> uint32_t softint;
> #define SOFTINT_TIMER 1
> #define SOFTINT_STIMER (1 << 16)
> +#define SOFTINT_INTRMASK (0xFFFE)
> +#define SOFTINT_TM (1 << 0)
> +#define SOFTINT_SM (1 << 16)
Why the duplicate definitions?
> +#define SOFTINT_REG_MASK (SOFTINT_SM|SOFTINT_INTRMASK|SOFTINT_TM)
> #endif
> sparc_def_t *def;
> } CPUSPARCState;
>
>
>
>
- [Qemu-devel] [PATCH 0/9] sparc64: tick timers, Igor V. Kovalenko, 2010/01/05
- [Qemu-devel] [PATCH 1/9] sparc64: trace pstate and global register set changes, Igor V. Kovalenko, 2010/01/05
- [Qemu-devel] [PATCH 2/9] sparc64: add PSR and PIL to cpu state dump, Igor V. Kovalenko, 2010/01/05
- [Qemu-devel] [PATCH 3/9] sparc64: use helper_wrpil to check pending irq on write, Igor V. Kovalenko, 2010/01/05
- [Qemu-devel] [PATCH 4/9] sparc64: check for pending irq when pil, pstate or softint is changed, Igor V. Kovalenko, 2010/01/05
- [Qemu-devel] [PATCH 5/9] sparc64: add macros to deal with softint and timer interrupt, Igor V. Kovalenko, 2010/01/05
- Re: [Qemu-devel] [PATCH 5/9] sparc64: add macros to deal with softint and timer interrupt,
Blue Swirl <=
- [Qemu-devel] [PATCH 6/9] sparc64: clear exception_index with -1 value, Igor V. Kovalenko, 2010/01/05
[Qemu-devel] [PATCH 7/9] sparc64: move cpu_interrupts_enabled to cpu.h, Igor V. Kovalenko, 2010/01/05
[Qemu-devel] [PATCH 8/9] sparc64: interrupt trap handling, Igor V. Kovalenko, 2010/01/05