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[Qemu-devel] [PATCH 13/13] target-alpha: Implement RPCC.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 13/13] target-alpha: Implement RPCC. |
Date: |
Wed, 7 Apr 2010 15:42:54 -0700 |
A minimal implementation that more or less corresponds to the
user-level version used by target-i386. More hoops will want
to be jumped through when alpha gets system-level emulation.
Signed-off-by: Richard Henderson <address@hidden>
---
qemu-timer.h | 13 +++++++++++++
target-alpha/cpu.h | 1 -
target-alpha/op_helper.c | 5 +++--
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/qemu-timer.h b/qemu-timer.h
index d2e15f4..6e2d2e1 100644
--- a/qemu-timer.h
+++ b/qemu-timer.h
@@ -209,6 +209,19 @@ static inline int64_t cpu_get_real_ticks(void)
return (int64_t)(count * cyc_per_count);
}
+#elif defined(__alpha__)
+
+static inline int64_t cpu_get_real_ticks(void)
+{
+ uint64_t cc;
+ uint32_t cur, ofs;
+
+ asm volatile("rpcc %0" : "=r"(cc));
+ cur = cc;
+ ofs = cc >> 32;
+ return cur - ofs;
+}
+
#else
/* The host CPU doesn't have an easily accessible cycle counter.
Just return a monotonically increasing value. This will be
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index dae23e2..c2f6a50 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -355,7 +355,6 @@ struct CPUAlphaState {
uint64_t ir[31];
float64 fir[31];
uint64_t pc;
- uint32_t pcc[2];
uint64_t ipr[IPR_LAST];
uint64_t ps;
uint64_t unique;
diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c
index bfc095c..ff5ae26 100644
--- a/target-alpha/op_helper.c
+++ b/target-alpha/op_helper.c
@@ -21,6 +21,7 @@
#include "host-utils.h"
#include "softfloat.h"
#include "helper.h"
+#include "qemu-timer.h"
/*****************************************************************************/
/* Exceptions processing helpers */
@@ -33,8 +34,8 @@ void QEMU_NORETURN helper_excp (int excp, int error)
uint64_t helper_load_pcc (void)
{
- /* XXX: TODO */
- return 0;
+ /* ??? This isn't a timer for which we have any rate info. */
+ return (uint32_t)cpu_get_real_ticks();
}
uint64_t helper_load_fpcr (void)
--
1.6.6.1
- [Qemu-devel] [PATCH 01/13] target-alpha: Add flags markups to helpers.h., (continued)
- [Qemu-devel] [PATCH 01/13] target-alpha: Add flags markups to helpers.h., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 10/13] target-alpha: Enable NPTL., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 07/13] target-alpha: Use non-inverted arguments to gen_{f}cmov., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 03/13] target-alpha: Implement rs/rc properly., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 11/13] target-alpha: Indicate NORETURN status when raising exception., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 08/13] target-alpha: Emit goto_tb opcodes., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 13/13] target-alpha: Implement RPCC.,
Richard Henderson <=
- [Qemu-devel] [PATCH 12/13] target-alpha: Fix load-locked/store-conditional., Richard Henderson, 2010/04/07
- [Qemu-devel] [PATCH 00/10] target-alpha improvments, version 5, Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 03/10] target-alpha: Implement cvtlq inline., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 05/10] target-alpha: Update commentary for opcode 0x1A., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 04/10] target-alpha: Emit goto_tb opcodes., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 08/10] target-alpha: Fix load-locked/store-conditional., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 07/10] target-alpha: Indicate NORETURN status when raising exception., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 01/10] target-alpha: Implement cpys{, n, e} inline., Richard Henderson, 2010/04/12
- [Qemu-devel] [PATCH 06/10] target-alpha: Enable NPTL., Richard Henderson, 2010/04/12