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Re: [Qemu-devel] Re: [PATCH 2/3] target-sparc: Free instruction tempora
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] Re: [PATCH 2/3] target-sparc: Free instruction temporaries. |
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Date: |
Sun, 18 Apr 2010 10:02:53 -0500 |
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User-agent: |
Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100330 Fedora/3.0.4-1.fc12 Thunderbird/3.0.4 |
On 04/17/2010 01:41 PM, Blue Swirl wrote:
> Yes, but we would still gain the small optimizations for add by 0, and
> with 0xffffffff etc. in tcg-op.h. Sparc QEMU target generates a lot of
> those because of poor constant formation choices made by the guest
> compilers.
Another thing that gets fixed by Aurelien's constant prop patch.
Don't think that Sparc is alone in generating x+0 in a way that
gets past the tcg-op.h checks.
> By the way, do you think constant pool approach (put constants at the
> end of TB) would be useful, especially for 64 bit constants?
Probably.
The support for that could probably be leveraged to move the TLB
miss code path out of line as well.
r~