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Re: [Qemu-devel] Question about qemu firmware configuration (fw_cfg) dev

From: Alexander Graf
Subject: Re: [Qemu-devel] Question about qemu firmware configuration (fw_cfg) device
Date: Mon, 19 Jul 2010 10:41:48 +0200

On 19.07.2010, at 10:30, Gleb Natapov wrote:

> On Mon, Jul 19, 2010 at 10:24:46AM +0200, Alexander Graf wrote:
>> On 19.07.2010, at 10:19, Gleb Natapov wrote:
>> Yes and no. It sounds nice at first, but doesn't quite fit. There are two 
>> issues:
>> 1) We need a new PCI ID
> We have our range. We can allocate from there.
>> 2) There can be a lot of initrd binaries with multiboot. We only have a 
>> limited amount of BARs
> Is it supported now with fw_cfg interface? My main concern with this
> approach is huge BAR size that may take a lot of space from PCI MMIO range
> if guest OS decide to configure it.

Oh, right. I think I combined all the modules into the INITRD blob. Yeah, that 
would work. Is coalesced MMIO more efficient than coalesced PIO? Or do we have 
to do some RAM mapping for those special BAR regions?

Were there DMA capable devices back in ISA times? There must be. If so, we can 
just take a look at what they do and do it similarly. Bus mastering was a new 
thing for PCI, right?


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