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Re: [Qemu-devel] [PATCH] Improve cmpxchg emulation.


From: malc
Subject: Re: [Qemu-devel] [PATCH] Improve cmpxchg emulation.
Date: Wed, 8 Sep 2010 18:11:50 +0400 (MSD)
User-agent: Alpine 2.00 (LNX 1167 2008-08-23)

On Wed, 8 Sep 2010, Jonathan A. Kollasch wrote:

> Change the accumulator only after performing the redundant write during
> cmpxchg.  This fixes pthreaded programs using fork() in NetBSD/i386
> guests.
> 
> >From Andreas Gustafsson in https://bugs.launchpad.net/qemu/+bug/569760.

This is tab damaged.

Secondly it looks as if this addresses only a small part of a general
problem [1], also in a very naive and inefficient way, while also opening
a hole can of worms (should real parallel execution for TCG be ever
implemented)

[1] http://www.mail-archive.com/address@hidden/msg40000.html

> 
> Signed-off-by: Jonathan A. Kollasch <address@hidden>
> ---
>  target-i386/translate.c |   12 ++++++++----
>  1 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index 7b6e3c2..391830f 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -4879,20 +4879,24 @@ static target_ulong disas_insn(DisasContext *s, 
> target_ulong pc_start)
>              tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0);
>              gen_extu(ot, t2);
>              tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1);
> +         label2 = gen_new_label();
>              if (mod == 3) {
> -                label2 = gen_new_label();
>                  gen_op_mov_reg_v(ot, R_EAX, t0);
>                  tcg_gen_br(label2);
>                  gen_set_label(label1);
>                  gen_op_mov_reg_v(ot, rm, t1);
> -                gen_set_label(label2);
>              } else {
> -                tcg_gen_mov_tl(t1, t0);
> +                /* perform no-op store cycle like physical cpu; must be
> +                before changing accumulator to ensure idempotency if
> +                the store faults and the instruction is restarted
> +             */
> +                gen_op_st_v(ot + s->mem_index, t0, a0);
>                  gen_op_mov_reg_v(ot, R_EAX, t0);
> +                tcg_gen_br(label2);
>                  gen_set_label(label1);
> -                /* always store */
>                  gen_op_st_v(ot + s->mem_index, t1, a0);
>              }
> +         gen_set_label(label2);
>              tcg_gen_mov_tl(cpu_cc_src, t0);
>              tcg_gen_mov_tl(cpu_cc_dst, t2);
>              s->cc_op = CC_OP_SUBB + ot;
> 

-- 
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