[Qemu-devel] [Bug 608107] Re: ppc fails to clear MSR_POW when incurring exception

[till]

I'm afraid I don't understand. My the problem and fix doesn't address mtmsr at 
all.
It just makes sure MSR_POW is cleared in MSR when an exception occurs.

Do you mean MSR_POW should masked from MSR before saving it to SRR1?
That's already taken care of (target-ppc/helper.c:2074 [qemu-0.12.4]).

-- 
ppc fails to clear MSR_POW when incurring exception
https://bugs.launchpad.net/bugs/608107
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.

Status in QEMU: Confirmed

Bug description:
QEMU VERSION: 0.12.4

According to FreeScale's 'Programming Environments Manual for 32-bit 
Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, 9/2005], 
section 6.5, table 6-7, an interrupt resets MSR_POW to zero but qemu-0.12.4 
fails to do so.
Resetting the bit is necessary in order to bring the processor out of 
power-management since otherwise it goes to sleep right away in the exception 
handler, i.e., it is impossible to leave PM-mode.