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Re: [SeaBIOS] [Qemu-devel] [RFC] Passing boot order from qemu to seabios

From: H. Peter Anvin
Subject: Re: [SeaBIOS] [Qemu-devel] [RFC] Passing boot order from qemu to seabios
Date: Wed, 13 Oct 2010 12:17:12 -0700
User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv: Gecko/20100921 Fedora/3.1.4-1.fc13 Thunderbird/3.1.4

On 10/12/2010 12:06 PM, Gleb Natapov wrote:
>> This is true to some extent -- there is some standard content, and some
>> further can be described via ACPI tables.  However, my point was mostly
>> that it is an existing model for nonvolatile storage which also works on
>> hardware (and is vastly simpler albeit smaller in size than ESCD).
> And my point is why would we want nonvolatile storage for BIOS settings
> in qemu. It doesn't provide anything that can't be done through command
> line and configured nicely by virt-manager and it introduces one more
> file to carry around with your VM. And if the idea is to create it on
> the fly then it is no longer nonvolatile and is not better then fw_cfg.
> If we want nonvolatile storage for some reason I would agree that CMOS
> is good candidate for that except of its size. How much can you fit into
> 128 byte? Less then one tweet.

128 bytes isn't a hard limit; the original PC/AT actually had only 64
bytes, but the "standard" interface allows 128 bytes.  However, there is
a semi-standard (common extension) interface using ports 72/73 which
allows 256 bytes, and quite a few chipsets have added further extensions.

The ACPI specification recognizes three interfaces as standard: PC/AT
(64 bytes, even though 128 bytes is available on a lot of platforms),
PIIX4 (256 bytes), and Dallas Semiconductor ("256 bytes or more").  The
interface for the latter isn't well cited in the ACPI spec, but I'm
guessing this is referring to the DS17885 series of chips, which can
have up to 8K CMOS using a bank-switched scheme which presents 128 bytes
at a time (thus accessible via only the standard 70/71 ports.)


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