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[Qemu-devel] [PATCH v8 02/11] pci: clean up pci command register io/memo
From: |
Isaku Yamahata |
Subject: |
[Qemu-devel] [PATCH v8 02/11] pci: clean up pci command register io/memory bit initialization |
Date: |
Mon, 15 Nov 2010 16:30:38 +0900 |
This patch fixes the initialization of io/memory bit of command register.
Those bits for type 1 device is RW.
Those bits for type 0 device is
RO = 0 if it has no io/memory BAR
RW if it has io/memory BAR
Signed-off-by: Isaku Yamahata <address@hidden>
---
hw/pci.c | 20 +++++++++++++++++---
1 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index b70a568..2fc8ab1 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -548,10 +548,14 @@ static void pci_init_wmask(PCIDevice *dev)
/*
* bit 0: PCI_COMMAND_IO
* type 0: if IO BAR is used, RW
- * type 1: RW
+ * This is handled by pci_register_bar()
+ * type 1: RW:
+ * This is fixed by pci_init_wmask_bridge()
* bit 1: PCI_COMMAND_MEMORY
* type 0: if IO BAR is used, RW
+ * This is handled by pci_register_bar()
* type 1: RW
+ * This is fixed by pci_init_wmask_bridge()
* bit 2: PCI_COMMAND_MASTER
* type 0: RW if bus master
* type 1: RW
@@ -586,8 +590,7 @@ static void pci_init_wmask(PCIDevice *dev)
* bit 11-15: reserved
*/
pci_set_word(dev->wmask + PCI_COMMAND,
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
+ PCI_COMMAND_MASTER | PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
PCI_COMMAND_INTX_DISABLE);
memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
@@ -596,6 +599,9 @@ static void pci_init_wmask(PCIDevice *dev)
static void pci_init_wmask_bridge(PCIDevice *d)
{
+ pci_word_test_and_set_mask(d->wmask + PCI_COMMAND,
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
+
/* PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS and
PCI_SEC_LETENCY_TIMER */
memset(d->wmask + PCI_PRIMARY_BUS, 0xff, 4);
@@ -833,6 +839,14 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
if (region_num == PCI_ROM_SLOT) {
/* ROM enable bit is writeable */
wmask |= PCI_ROM_ADDRESS_ENABLE;
+ } else {
+ if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
+ pci_word_test_and_set_mask(pci_dev->wmask + PCI_COMMAND,
+ PCI_COMMAND_IO);
+ } else {
+ pci_word_test_and_set_mask(pci_dev->wmask + PCI_COMMAND,
+ PCI_COMMAND_MEMORY);
+ }
}
pci_set_long(pci_dev->config + addr, type);
if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) &&
--
1.7.1.1
- [Qemu-devel] [PATCH v8 00/11] pcie port switch emulators, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 03/11] pci: fix accesses to pci status register, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 02/11] pci: clean up pci command register io/memory bit initialization,
Isaku Yamahata <=
- [Qemu-devel] [PATCH v8 10/11] x3130/upstream: support aer, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 06/11] pcie/aer: helper functions for pcie aer capability, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 05/11] pcie_regs.h: more constants, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 11/11] x3130/downstream: support aer., Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 09/11] ioh3420: support aer, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 04/11] pci: clean up of pci status register, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 01/11] pci: revise pci command register initialization, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 08/11] pcie/aer: glue aer error injection into qemu monitor, Isaku Yamahata, 2010/11/15
- [Qemu-devel] [PATCH v8 07/11] pci: introduce a parser for pci device path, Isaku Yamahata, 2010/11/15