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Re: [Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassem
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH] arm-dis: Include opcode hex when doing disassembly |
Date: |
Mon, 10 Jan 2011 17:49:26 +0100 |
User-agent: |
Mutt/1.5.18 (2008-05-17) |
On Mon, Jan 10, 2011 at 04:16:26PM +0000, Peter Maydell wrote:
> Enhance the ARM disassembler used for debugging so that it includes
> the hex dump of the opcode as well as the symbolic disassembly.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> This is based on meego-qemu commit e548a60c with a change suggested
> last time that patch was sent to qemu-devel:
> http://www.mail-archive.com/address@hidden/msg28258.html
> http://www.mail-archive.com/address@hidden/msg29235.html
>
> I have used GNU-style indent conventions in this change because
> the rest of this file consistently does so (being from libopcode
> originally).
>
> arm-dis.c | 24 ++++++++++++++++++++++++
> 1 files changed, 24 insertions(+), 0 deletions(-)
Strangely on arm host, the opcode hex is already included, as shown
below:
| OUT: [size=308]
| 0x01001ec0: e5974004 ldr r4, [r7, #4]
| 0x01001ec4: e1a04804 lsl r4, r4, #16
| 0x01001ec8: e1a04824 lsr r4, r4, #16
| 0x01001ecc: e1a04404 lsl r4, r4, #8
Maybe there is just an option to enable to allow that?
--
Aurelien Jarno GPG: 1024D/F1BCDB73
address@hidden http://www.aurel32.net