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[Qemu-devel] [PATCH 08/10] target-arm: Fix signed VQRSHL by large shift
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 08/10] target-arm: Fix signed VQRSHL by large shift counts |
Date: |
Tue, 15 Feb 2011 13:44:48 +0000 |
Handle the case of signed VQRSHL by a shift count of the width of the
data type or larger, which must be special cased in the qrshl_s*
helper functions.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/neon_helper.c | 34 +++++++++++++++++++++++++++++++---
1 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 7859f0b..f8f6db6 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -880,7 +880,19 @@ uint64_t HELPER(neon_qrshl_u64)(CPUState *env, uint64_t
val, uint64_t shiftop)
#define NEON_FN(dest, src1, src2) do { \
int8_t tmp; \
tmp = (int8_t)src2; \
- if (tmp < 0) { \
+ if (tmp >= (ssize_t)sizeof(src1) * 8) { \
+ if (src1) { \
+ SET_QC(); \
+ dest = (1 << (sizeof(src1) * 8 - 1)); \
+ if (src1 > 0) { \
+ dest--; \
+ } \
+ } else { \
+ dest = 0; \
+ } \
+ } else if (tmp <= -(ssize_t)sizeof(src1) * 8) { \
+ dest = 0; \
+ } else if (tmp < 0) { \
dest = (src1 + (1 << (-1 - tmp))) >> -tmp; \
} else { \
dest = src1 << tmp; \
@@ -903,7 +915,16 @@ uint32_t HELPER(neon_qrshl_s32)(CPUState *env, uint32_t
valop, uint32_t shiftop)
int32_t dest;
int32_t val = (int32_t)valop;
int8_t shift = (int8_t)shiftop;
- if (shift < 0) {
+ if (shift >= 32) {
+ if (val) {
+ SET_QC();
+ dest = (val >> 31) ^ ~SIGNBIT;
+ } else {
+ dest = 0;
+ }
+ } else if (shift <= -32) {
+ dest = 0;
+ } else if (shift < 0) {
int64_t big_dest = ((int64_t)val + (1 << (-1 - shift)));
dest = big_dest >> -shift;
} else {
@@ -923,7 +944,14 @@ uint64_t HELPER(neon_qrshl_s64)(CPUState *env, uint64_t
valop, uint64_t shiftop)
int8_t shift = (uint8_t)shiftop;
int64_t val = valop;
- if (shift < 0) {
+ if (shift >= 64) {
+ if (val) {
+ SET_QC();
+ val = (val >> 63) ^ ~SIGNBIT64;
+ }
+ } else if (shift <= -64) {
+ val = 0;
+ } else if (shift < 0) {
val >>= (-shift - 1);
if (val == INT64_MAX) {
/* In this case, it means that the rounding constant is 1,
--
1.7.1
- [Qemu-devel] [PATCH 00/10] Fix Neon shift instructions, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 03/10] target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 10/10] target-arm: Fix shift by immediate and narrow where src, dest overlap, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 08/10] target-arm: Fix signed VQRSHL by large shift counts,
Peter Maydell <=
- [Qemu-devel] [PATCH 04/10] target-arm: fix unsigned 64 bit right shifts., Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 07/10] target-arm: fix decoding of Neon 64 bit shifts., Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 05/10] target-arm: Fix saturated values for Neon right shifts, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 02/10] target-arm: Fix signed VRSHL by large shift counts, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 01/10] target-arm: Fix rounding constant addition for Neon shifts, Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 06/10] target-arm: fix Neon VQSHRN and VSHRN., Peter Maydell, 2011/02/15
- [Qemu-devel] [PATCH 09/10] target-arm: Fix unsigned VQRSHL by large shift counts, Peter Maydell, 2011/02/15
- [Qemu-devel] Re: [PATCH 00/10] Fix Neon shift instructions, Christophe Lyon, 2011/02/15
- Re: [Qemu-devel] [PATCH 00/10] Fix Neon shift instructions, Aurelien Jarno, 2011/02/20