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[Qemu-devel] [PATCH v7 4/4] piix_pci: load path clean up

From: Isaku Yamahata
Subject: [Qemu-devel] [PATCH v7 4/4] piix_pci: load path clean up
Date: Fri, 1 Apr 2011 20:43:24 +0900

The previous patch didn't change the behavior when load,
it resulted in ugly code. This patch cleans it up.

With this patch, pic irq lines are manipulated when loaded.
It is expected that it won't change the behaviour because
the interrupts are level: at the moment e.g. pci devices already
reassert interrupts on load.

- rung linux as guest and use flooding ping (ping -f) to host
  in order to trigger interrupts for e1000 emulated.
- savevm/loadvm and see guest kept running after loadvm.

To be honest, I'm not sure that ping -f caused enough interrupts
because Linux e1000 driver supports NAPI.
TODO: test more OSes, stress test with save/load, live-migration

Signed-off-by: Isaku Yamahata <address@hidden>
Changes v3 -> v4:
- newly introduced
 hw/piix_pci.c |   12 ++++--------
 1 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 7ffb821..5f0d92f 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -281,8 +281,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int 
                      (pic_irq * PIIX_NUM_PIRQS))));
-static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level,
-                                bool propagate)
+static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
     int pic_irq;
     uint64_t mask;
@@ -296,15 +295,13 @@ static void piix3_set_irq_level(PIIX3State *piix3, int 
pirq, int level,
     piix3->pic_levels &= ~mask;
     piix3->pic_levels |= mask * !!level;
-    if (propagate) {
-        piix3_set_irq_pic(piix3, pic_irq);
-    }
+    piix3_set_irq_pic(piix3, pic_irq);
 static void piix3_set_irq(void *opaque, int pirq, int level)
     PIIX3State *piix3 = opaque;
-    piix3_set_irq_level(piix3, pirq, level, true);
+    piix3_set_irq_level(piix3, pirq, level);
 /* irq routing is changed. so rebuild bitmap */
@@ -315,8 +312,7 @@ static void piix3_update_irq_levels(PIIX3State *piix3)
     piix3->pic_levels = 0;
     for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
         piix3_set_irq_level(piix3, pirq,
-                            pci_bus_get_irq_level(piix3->dev.bus, pirq),
-                            false);
+                            pci_bus_get_irq_level(piix3->dev.bus, pirq));

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