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[Qemu-devel] [PATCH 6/7] softfloat: Add new flag for when denormal resul
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 6/7] softfloat: Add new flag for when denormal result is flushed to zero |
Date: |
Fri, 6 May 2011 13:48:14 +0100 |
Add a new float_flag_output_denormal which is set when the result
of a floating point operation would be denormal but is flushed to
zero because we are in flush_to_zero mode. This is necessary because
some architectures signal this condition as an underflow and others
signal it as an inexact result.
Signed-off-by: Peter Maydell <address@hidden>
---
fpu/softfloat.c | 41 ++++++++++++++++++++++++++++++++++-------
fpu/softfloat.h | 3 ++-
2 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index baba1dc..e3cd8a7 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -341,7 +341,10 @@ static float32 roundAndPackFloat32( flag zSign, int16
zExp, uint32_t zSig STATUS
return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
}
if ( zExp < 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat32( zSign, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ return packFloat32(zSign, 0, 0);
+ }
isTiny =
( STATUS(float_detect_tininess) ==
float_tininess_before_rounding )
|| ( zExp < -1 )
@@ -520,7 +523,10 @@ static float64 roundAndPackFloat64( flag zSign, int16
zExp, uint64_t zSig STATUS
return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 ));
}
if ( zExp < 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat64( zSign, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ return packFloat64(zSign, 0, 0);
+ }
isTiny =
( STATUS(float_detect_tininess) ==
float_tininess_before_rounding )
|| ( zExp < -1 )
@@ -699,7 +705,10 @@ static floatx80
goto overflow;
}
if ( zExp <= 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloatx80( zSign, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ return packFloatx80(zSign, 0, 0);
+ }
isTiny =
( STATUS(float_detect_tininess) ==
float_tininess_before_rounding )
|| ( zExp < 0 )
@@ -1030,7 +1039,10 @@ static float128
return packFloat128( zSign, 0x7FFF, 0, 0 );
}
if ( zExp < 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat128( zSign, 0, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ return packFloat128(zSign, 0, 0, 0);
+ }
isTiny =
( STATUS(float_detect_tininess) ==
float_tininess_before_rounding )
|| ( zExp < -1 )
@@ -1761,7 +1773,12 @@ static float32 addFloat32Sigs( float32 a, float32 b,
flag zSign STATUS_PARAM)
return a;
}
if ( aExp == 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat32( zSign, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ if (aSig | bSig) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ }
+ return packFloat32(zSign, 0, 0);
+ }
return packFloat32( zSign, 0, ( aSig + bSig )>>6 );
}
zSig = 0x40000000 + aSig + bSig;
@@ -3120,7 +3137,12 @@ static float64 addFloat64Sigs( float64 a, float64 b,
flag zSign STATUS_PARAM )
return a;
}
if ( aExp == 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat64( zSign, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ if (aSig | bSig) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ }
+ return packFloat64(zSign, 0, 0);
+ }
return packFloat64( zSign, 0, ( aSig + bSig )>>9 );
}
zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;
@@ -5282,7 +5304,12 @@ static float128 addFloat128Sigs( float128 a, float128 b,
flag zSign STATUS_PARAM
}
add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
if ( aExp == 0 ) {
- if ( STATUS(flush_to_zero) ) return packFloat128( zSign, 0, 0, 0 );
+ if (STATUS(flush_to_zero)) {
+ if (zSig0 | zSig1) {
+ float_raise(float_flag_output_denormal STATUS_VAR);
+ }
+ return packFloat128(zSign, 0, 0, 0);
+ }
return packFloat128( zSign, 0, zSig0, zSig1 );
}
zSig2 = 0;
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 5eff085..58c9b7b 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -193,7 +193,8 @@ enum {
float_flag_overflow = 8,
float_flag_underflow = 16,
float_flag_inexact = 32,
- float_flag_input_denormal = 64
+ float_flag_input_denormal = 64,
+ float_flag_output_denormal = 128
};
typedef struct float_status {
--
1.7.1
- [Qemu-devel] [PATCH 0/7] target-arm: Fix bugs in fp exception flag setting, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 3/7] target-arm: Signal InvalidOp for Neon GE and GT compares of QNaN, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 7/7] target-arm: Signal Underflow when denormal flushed to zero on output, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 2/7] target-arm: Signal InputDenormal for VRECPE, VRSQRTE, VRECPS, VRSQRTS, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 1/7] target-arm: Don't set FP exceptions in recip, recip_sqrt estimate fns, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 6/7] softfloat: Add new flag for when denormal result is flushed to zero,
Peter Maydell <=
- [Qemu-devel] [PATCH 5/7] target-arm: Add separate Neon float-int conversion helpers, Peter Maydell, 2011/05/06
- [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Peter Maydell, 2011/05/06
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Paul Brook, 2011/05/06
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Peter Maydell, 2011/05/06
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Blue Swirl, 2011/05/06
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Paul Brook, 2011/05/06
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Blue Swirl, 2011/05/08
- Re: [Qemu-devel] [PATCH 4/7] target-arm: Refactor int-float conversions, Aurelien Jarno, 2011/05/14
Re: [Qemu-devel] [PATCH 0/7] target-arm: Fix bugs in fp exception flag setting, Peter Maydell, 2011/05/17