Re: [Qemu-devel] [RFC] Memory API

[Avi Kivity]

On 05/19/2011 04:44 PM, Anthony Liguori wrote:
> The i440fx may direct VGA accesses to RAM depending on the SMM 
> registers.  By the time the PIIX gets the I/O request, we're past the 
> memory controller.
>
> This is my biggest concern about this whole notion of "priority".  
> These sort of issues are not dealt with by a simple z-ordering.  There 
> is logic in each component that may be arbitrarily complex.
>
> We're going to end up having to dynamically change the "priority" 
> based how registers are programmed.  But priorities are relative so 
> it's unclear to me how the I440FX would prioritize RAM over dispatch 
> to PIIX (for VGA, for instance).

You can change priorities by removing the region and re-adding it with a 
different priority.  In practice I don't think this is ever necessary; 
we'll have fixed priorities and dynamic addition and removal.

For the per-cpu SMM case the only reasonable solution I see is a per-cpu 
memory map (= root region).

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