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[Qemu-devel] [PATCH] target-i386: GPF on invalid MSRs
From: |
Josh Triplett |
Subject: |
[Qemu-devel] [PATCH] target-i386: GPF on invalid MSRs |
Date: |
Thu, 26 May 2011 02:08:06 -0700 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
qemu currently returns 0 for rdmsr on invalid MSRs, and ignores wrmsr on
invalid MSRs. Real x86 processors GPF on invalid MSRs, which allows
software to detect unavailable MSRs. Emulate this behavior correctly in
qemu.
Bug discovered via the BIOS Implementation Test Suite
<http://biosbits.org/>; fix tested the same way, for both 32-bit and
64-bit x86.
Signed-off-by: Josh Triplett <address@hidden>
---
op_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -Naur a/target-i386/op_helper.c b/target-i386/op_helper.c
--- a/target-i386/op_helper.c 2011-02-07 15:13:34.000000000 -0800
+++ b/target-i386/op_helper.c 2011-05-26 00:08:49.608636117 -0700
@@ -3135,7 +3135,7 @@
env->mce_banks[offset] = val;
break;
}
- /* XXX: exception ? */
+ raise_exception(EXCP0D_GPF);
break;
}
}
@@ -3266,7 +3266,7 @@
val = env->mce_banks[offset];
break;
}
- /* XXX: exception ? */
+ raise_exception(EXCP0D_GPF);
val = 0;
break;
}
- [Qemu-devel] [PATCH] target-i386: GPF on invalid MSRs,
Josh Triplett <=