Re: [Qemu-devel] [PATCH] Sparc32: dummy implementation of MXCC MMU breakpoint registers

[Peter Maydell]

On 18 June 2011 22:45, Blue Swirl <address@hidden> wrote:
> Add dummy registers for SuperSPARC MXCC MMU counter breakpoints.
>
> Signed-off-by: Blue Swirl <address@hidden>

> diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
> index 320530e..b5d5291 100644
> --- a/target-sparc/cpu.h
> +++ b/target-sparc/cpu.h
> @@ -403,6 +403,7 @@ typedef struct CPUSPARCState {
>     uint32_t mmuregs[32];
>     uint64_t mxccdata[4];
>     uint64_t mxccregs[8];
> +    uint32_t mmubpctrv, mmubpctrc, mmubpctrs, mmubpaction;
>     uint64_t mmubpregs[4];
>     uint64_t prom_addr;
>  #endif

Shouldn't there be a corresponding change to target-sparc/machine.c
adding these to cpu_save()/cpu_load() ?  [the existing mxccdata,
mxccregs, mmubpregs don't seem to be saved/restored either...]

-- PMM