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[Qemu-devel] [PATCH 027/111] m68k: add DBcc instruction.
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 027/111] m68k: add DBcc instruction. |
Date: |
Wed, 17 Aug 2011 15:46:32 -0500 |
From: Andreas Schwab <address@hidden>
Laurent Vivier <address@hidden> writes:
> + tmp = tcg_temp_new();
> + tcg_gen_ext16s_i32(tmp, reg);
> + tcg_gen_addi_i32(tmp, tmp, -1);
> + gen_partset_reg(OS_WORD, reg, tmp);
> + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
The counter needs to be compared with -1, not 0.
Andreas.
---
target-m68k/translate.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 218210c..d4d2f44 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -939,7 +939,7 @@ DISAS_INSN(dbcc)
tcg_gen_ext16s_i32(tmp, reg);
tcg_gen_addi_i32(tmp, tmp, -1);
gen_partset_reg(OS_WORD, reg, tmp);
- tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1);
gen_jmp_tb(s, 1, base + offset);
gen_set_label(l1);
gen_jmp_tb(s, 0, s->pc);
--
1.7.2.3
- [Qemu-devel] [PATCH 042/111] m68k: set X flag according size of operand Set X flag correctly for addsub, arith_im, addsubq., (continued)
- [Qemu-devel] [PATCH 042/111] m68k: set X flag according size of operand Set X flag correctly for addsub, arith_im, addsubq., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 085/111] m68k: add fatan instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 073/111] m68k: add cmpm instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 055/111] m68k: Correct bfclr in register case., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 054/111] m68k: Added ULL to 64 bit integer in helper.c, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 040/111] m68k: add sbcd instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 082/111] m68k: add fmod instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 068/111] m68k: correct addsubq, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 053/111] m68k: for bitfield opcodes, correct operands corruption, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 057/111] m68k: correctly compute divsl, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 027/111] m68k: add DBcc instruction.,
Bryce Lanham <=
- [Qemu-devel] [PATCH 083/111] m68k: flush flags before negx instruction., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 084/111] m68k: correct fmovemx FP registers order., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 047/111] m68k: use read_imm1() when it is possible, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 079/111] m68k: add fsin instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 087/111] m68k: fcmp correctly compares infinity., Bryce Lanham, 2011/08/17
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Anthony Liguori, 2011/08/17