[Qemu-devel] [PATCH 101/111] m68k: correctly load signed word into floating point register

[Bryce Lanham]

From: Laurent Vivier <address@hidden>

Signed-off-by: Laurent Vivier <address@hidden>
---
 target-m68k/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 0a14597..987bd84 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -839,7 +839,7 @@ static inline void gen_load_FP0(DisasContext * s, int 
opsize, TCGv addr)
         gen_helper_exts32_FP0(cpu_env);
         break;
     case OS_WORD:
-        tcg_gen_qemu_ld16u(QREG_FP0H, addr, index);
+        tcg_gen_qemu_ld16s(QREG_FP0H, addr, index);
         gen_helper_exts32_FP0(cpu_env);
         break;
     case OS_LONG:
-- 
1.7.2.3