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[Qemu-devel] [PATCH v3 06/32] target-xtensa: add sample board
From: |
Max Filippov |
Subject: |
[Qemu-devel] [PATCH v3 06/32] target-xtensa: add sample board |
Date: |
Thu, 1 Sep 2011 01:56:57 +0400 |
Sample board and sample CPU core are used for debug and may be used for
development of custom SoC emulators.
This board has two fixed size memory regions for DTCM and ITCM and
variable length SRAM region.
Signed-off-by: Max Filippov <address@hidden>
---
Makefile.target | 1 +
hw/xtensa_sample.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 106 insertions(+), 0 deletions(-)
create mode 100644 hw/xtensa_sample.c
diff --git a/Makefile.target b/Makefile.target
index b833c10..98455e3 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -374,6 +374,7 @@ obj-alpha-y = i8259.o mc146818rtc.o
obj-alpha-y += vga.o cirrus_vga.o
obj-xtensa-y += xtensa_pic.o
+obj-xtensa-y += xtensa_sample.o
main.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/hw/xtensa_sample.c b/hw/xtensa_sample.c
new file mode 100644
index 0000000..9f7733b
--- /dev/null
+++ b/hw/xtensa_sample.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "sysemu.h"
+#include "boards.h"
+#include "loader.h"
+#include "elf.h"
+
+static void xtensa_sample_reset(void *env)
+{
+ cpu_reset(env);
+}
+
+static void xtensa_init(ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename, const char *cpu_model)
+{
+ CPUState *env = NULL;
+ ram_addr_t ram_offset;
+ int n;
+
+ for (n = 0; n < smp_cpus; n++) {
+ env = cpu_init(cpu_model);
+ if (!env) {
+ fprintf(stderr, "Unable to find CPU definition\n");
+ exit(1);
+ }
+ qemu_register_reset(xtensa_sample_reset, env);
+ }
+
+ ram_offset = qemu_ram_alloc(NULL, "xtensa.dram", 0x10000);
+ cpu_register_physical_memory(0x5ffd0000, 0x10000, ram_offset);
+
+ ram_offset = qemu_ram_alloc(NULL, "xtensa.iram", 0x20000);
+ cpu_register_physical_memory(0x5ffe0000, 0x20000, ram_offset);
+
+ ram_offset = qemu_ram_alloc(NULL, "xtensa.sram", ram_size);
+ cpu_register_physical_memory(0x60000000, ram_size, ram_offset);
+
+ if (kernel_filename) {
+ uint64_t elf_entry;
+ uint64_t elf_lowaddr;
+#ifdef TARGET_WORDS_BIGENDIAN
+ int success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
+ &elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
+#else
+ int success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
+ &elf_lowaddr, NULL, 0, ELF_MACHINE, 0);
+#endif
+ if (success > 0) {
+ env->pc = elf_entry;
+ }
+ }
+}
+
+static void xtensa_sample_init(ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename, const char *cpu_model)
+{
+ if (!cpu_model) {
+ cpu_model = "sample-xtensa-core";
+ }
+ xtensa_init(ram_size, boot_device, kernel_filename, kernel_cmdline,
+ initrd_filename, cpu_model);
+}
+
+static QEMUMachine xtensa_sample_machine = {
+ .name = "sample-xtensa-machine",
+ .desc = "Sample Xtensa machine (sample Xtensa core)",
+ .init = xtensa_sample_init,
+ .max_cpus = 4,
+};
+
+static void xtensa_sample_machine_init(void)
+{
+ qemu_register_machine(&xtensa_sample_machine);
+}
+
+machine_init(xtensa_sample_machine_init);
--
1.7.6
- [Qemu-devel] [PATCH v3 31/32] MAINTAINERS: add xtensa maintainer, (continued)
- [Qemu-devel] [PATCH v3 31/32] MAINTAINERS: add xtensa maintainer, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 05/32] target-xtensa: implement RT0 group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 14/32] target-xtensa: implement SYNC group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 08/32] target-xtensa: implement JX/RET0/CALLX, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 02/32] target-xtensa: add target to the configure script, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 26/32] target-xtensa: implement CPENABLE and PRID SRs, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 04/32] target-xtensa: implement narrow instructions, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 15/32] target-xtensa: implement CACHE group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 09/32] target-xtensa: add special and user registers, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 16/32] target-xtensa: add PS register and access control, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 06/32] target-xtensa: add sample board,
Max Filippov <=
- [Qemu-devel] [PATCH v3 18/32] target-xtensa: implement RST2 group (32 bit mul/div/rem), Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 21/32] target-xtensa: implement extended L32R, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 12/32] target-xtensa: implement LSAI group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 07/32] target-xtensa: implement conditional jumps, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 10/32] target-xtensa: implement RST3 group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 22/32] target-xtensa: implement unaligned exception option, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 27/32] target-xtensa: implement relocatable vectors, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 20/32] target-xtensa: implement loop option, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 13/32] target-xtensa: mark reserved and TBD opcodes, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 11/32] target-xtensa: implement shifts (ST1 and RST1 groups), Max Filippov, 2011/08/31