[Qemu-devel] [PATCH 05/11] lm32_uart: convert to memory API

[Benoît Canet]

Signed-off-by: Benoît Canet <address@hidden>
---
 hw/lm32_uart.c |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/hw/lm32_uart.c b/hw/lm32_uart.c
index 3678545..5701c88 100644
--- a/hw/lm32_uart.c
+++ b/hw/lm32_uart.c
@@ -27,6 +27,7 @@
 #include "trace.h"
 #include "qemu-char.h"
 #include "qemu-error.h"
+#include "exec-memory.h"
 
 enum {
     R_RXTX = 0,
@@ -91,6 +92,7 @@ enum {
 
 struct LM32UartState {
     SysBusDevice busdev;
+    MemoryRegion iomem;
     CharDriverState *chr;
     qemu_irq irq;
 
@@ -124,7 +126,8 @@ static void uart_update_irq(LM32UartState *s)
     qemu_set_irq(s->irq, irq);
 }
 
-static uint32_t uart_read(void *opaque, target_phys_addr_t addr)
+static uint64_t uart_read(void *opaque, target_phys_addr_t addr,
+                          unsigned size)
 {
     LM32UartState *s = opaque;
     uint32_t r = 0;
@@ -158,7 +161,8 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t 
addr)
     return r;
 }
 
-static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void uart_write(void *opaque, target_phys_addr_t addr,
+                       uint64_t value, unsigned size)
 {
     LM32UartState *s = opaque;
     unsigned char ch = value;
@@ -192,16 +196,14 @@ static void uart_write(void *opaque, target_phys_addr_t 
addr, uint32_t value)
     uart_update_irq(s);
 }
 
-static CPUReadMemoryFunc * const uart_read_fn[] = {
-    NULL,
-    NULL,
-    &uart_read,
-};
-
-static CPUWriteMemoryFunc * const uart_write_fn[] = {
-    NULL,
-    NULL,
-    &uart_write,
+static const MemoryRegionOps uart_ops = {
+    .read = uart_read,
+    .write = uart_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,
+    .valid = {
+        .min_access_size = 4,
+        .max_access_size = 4,
+    },
 };
 
 static void uart_rx(void *opaque, const uint8_t *buf, int size)
@@ -245,13 +247,11 @@ static void uart_reset(DeviceState *d)
 static int lm32_uart_init(SysBusDevice *dev)
 {
     LM32UartState *s = FROM_SYSBUS(typeof(*s), dev);
-    int uart_regs;
 
     sysbus_init_irq(dev, &s->irq);
 
-    uart_regs = cpu_register_io_memory(uart_read_fn, uart_write_fn, s,
-            DEVICE_NATIVE_ENDIAN);
-    sysbus_init_mmio(dev, R_MAX * 4, uart_regs);
+    memory_region_init_io(&s->iomem, &uart_ops, s, "uart", R_MAX * 4);
+    sysbus_init_mmio_region(dev, &s->iomem);
 
     s->chr = qdev_init_chardev(&dev->qdev);
     if (s->chr) {
-- 
1.7.7.3