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Re: [Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode an
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not treated as 32 bit code see gen_op_addr_add() in translate.c |
Date: |
Wed, 14 Dec 2011 09:05:09 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111115 Thunderbird/8.0 |
On 12/08/2011 04:04 PM, Andreas Färber wrote:
>> > + /* if cpu has FPU, MIPS_HFLAG_F64 must be included in env->hflags
>> > + so that floating point operations can be emulated */
>> > + env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
>> > if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
>> > env->hflags |= MIPS_HFLAG_F64;
>> > }
> Nack. env->active_fpu.fcr0 gets initialized in translate_init.c based on
> cpu_model->CR1_fcr0, where FCR0_F64 is set only for 24Kf, 34Kf,
> MIPS64R2-generic. TARGET_ABI_MIPSN64 linux-user defaults to 20Kc. So it
> seems to rather be an issue of using the right -cpu parameter or
> changing the default for n64. [cc'ing Nathan, who introduced the if]
That said, there's still something missing, e.g. MIPS_HFLAG_COP1X.
My first guess is simply
if (env->insn_flags & (ISA_MIPS32 | ISA_MIPS4)) {
env->hflags |= MIPS_HFLAG_COP1X;
}
immediately after this MIPS64 hunk.
r~