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[Qemu-devel] [PATCH 9/9] arm: increase a9mp interrupts to 160
From: |
Mark Langsdorf |
Subject: |
[Qemu-devel] [PATCH 9/9] arm: increase a9mp interrupts to 160 |
Date: |
Thu, 22 Dec 2011 12:20:14 -0600 |
From: Rob Herring <address@hidden>
Signed-off-by: Rob Herring <address@hidden>
Signed-off-by: Mark Langsdorf <address@hidden>
---
hw/a9mpcore.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/a9mpcore.c b/hw/a9mpcore.c
index 875ae98..93b0498 100644
--- a/hw/a9mpcore.c
+++ b/hw/a9mpcore.c
@@ -13,7 +13,7 @@
/* Configuration for arm_gic.c:
* number of external IRQ lines, max number of CPUs, how to ID current CPU
*/
-#define GIC_NIRQ 96
+#define GIC_NIRQ 160
#define NCPU 4
static inline int
--
1.7.5.4
- [Qemu-devel] [PATCH v2 0/9] various ARM fixes, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 4/9] arm: add dummy gic security registers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 2/9] arm: Set frequencies for arm_timer, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 1/9] arm: add missing scu registers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 9/9] arm: increase a9mp interrupts to 160,
Mark Langsdorf <=
- [Qemu-devel] [PATCH v2 3/9] arm: add dummy v7 cp15 config_base_register, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 8/9] Add xgmac ethernet model, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 6/9] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 7/9] add L2x0/PL310 cache controller device, Mark Langsdorf, 2011/12/22