Re: [Qemu-devel] [PATCH 1/5] i8259: qdev-ify creation

[Jan Kiszka]

On 2012-01-12 09:18, Alexander Graf wrote:
> 
> On 12.01.2012, at 09:09, Jan Kiszka wrote:
> 
>> On 2012-01-12 09:05, Alexander Graf wrote:
>>>
>>> On 12.01.2012, at 09:00, Jan Kiszka wrote:
>>>
>>>> On 2012-01-12 08:58, Alexander Graf wrote:
>>>>>
>>>>> On 12.01.2012, at 08:35, Jan Kiszka wrote:
>>>>>
>>>>>> On 2012-01-12 01:04, Andreas Färber wrote:
>>>>>>> Alex,
>>>>>>>
>>>>>>> I have this in my mailbox, but I'm still waiting for an SoB. Hervé?
>>>>>>>
>>>>>>> Regards,
>>>>>>> Andreas
>>>>>>>
>>>>>>> -------- Original-Nachricht --------
>>>>>>> Betreff: [PATCH 1/5] i8259: qdev-ify creation
>>>>>>> Datum: Sun, 26 Jun 2011 14:47:09 +0200
>>>>>>> Von: Hervé Poussineau <address@hidden>
>>>>>>> An: address@hidden
>>>>>>> Kopie (CC): Hervé Poussineau <address@hidden>
>>>>>>>
>>>>>>> ---
>>>>>>> hw/i8259.c |   53 +++++++++++++++++++++++++++++++++++++++++++++++++----
>>>>>>> 1 files changed, 49 insertions(+), 4 deletions(-)
>>>>>>>
>>>>>>> diff --git a/hw/i8259.c b/hw/i8259.c
>>>>>>> index 84d330d..59e8bd6 100644
>>>>>>> --- a/hw/i8259.c
>>>>>>> +++ b/hw/i8259.c
>>>>>>> @@ -26,6 +26,7 @@
>>>>>>> #include "isa.h"
>>>>>>> #include "monitor.h"
>>>>>>> #include "qemu-timer.h"
>>>>>>> +#include "sysbus.h"
>>>>>>>
>>>>>>> /* debug PIC */
>>>>>>> //#define DEBUG_PIC
>>>>>>> @@ -524,16 +525,60 @@ void irq_info(Monitor *mon)
>>>>>>>
>>>>>>> qemu_irq *i8259_init(qemu_irq parent_irq)
>>>>>>> {
>>>>>>> -    PicState2 *s;
>>>>>>> +    DeviceState *dev;
>>>>>>> +    dev = qdev_create(NULL, "i8259");
>>>>>>> +    qdev_init_nofail(dev);
>>>>>>> +    qdev_connect_gpio_out(dev, 0, parent_irq);
>>>>>>> +
>>>>>>> +    return dev->gpio_in;
>>>>>>> +}
>>>>>>> +
>>>>>>> +typedef struct SysBusPicState2 {
>>>>>>> +    SysBusDevice busdev;
>>>>>>> +    PicState2 state;
>>>>>>> +} SysBusPicState2;
>>>>>>> +
>>>>>>> +static void i8259_set_irq_sysbus(void *opaque, int line, int level)
>>>>>>> +{
>>>>>>> +    SysBusPicState2 *sysbus = opaque;
>>>>>>> +    PicState2 *s = &sysbus->state;
>>>>>>> +    i8259_set_irq(s, line, level);
>>>>>>> +}
>>>>>>> +
>>>>>>> +static int i8259_sysbus_init(SysBusDevice *dev)
>>>>>>> +{
>>>>>>> +    SysBusPicState2 *sysbus = FROM_SYSBUS(SysBusPicState2, dev);
>>>>>>> +    PicState2 *s = &sysbus->state;
>>>>>>> +
>>>>>>> +    if (isa_pic) {
>>>>>>> +        return 1;
>>>>>>> +    }
>>>>>>>
>>>>>>> -    s = qemu_mallocz(sizeof(PicState2));
>>>>>>>   pic_init1(0x20, 0x4d0, &s->pics[0]);
>>>>>>>   pic_init1(0xa0, 0x4d1, &s->pics[1]);
>>>>>>>   s->pics[0].elcr_mask = 0xf8;
>>>>>>>   s->pics[1].elcr_mask = 0xde;
>>>>>>> -    s->parent_irq = parent_irq;
>>>>>>>   s->pics[0].pics_state = s;
>>>>>>>   s->pics[1].pics_state = s;
>>>>>>>   isa_pic = s;
>>>>>>> -    return qemu_allocate_irqs(i8259_set_irq, s, 16);
>>>>>>> +
>>>>>>> +    qdev_init_gpio_in(&dev->qdev, i8259_set_irq_sysbus, 16);
>>>>>>> +    qdev_init_gpio_out(&dev->qdev, &s->parent_irq, 1);
>>>>>>> +    return 0;
>>>>>>> +}
>>>>>>> +
>>>>>>> +static SysBusDeviceInfo i8259_sysbus_info = {
>>>>>>> +    .qdev.name = "i8259",
>>>>>>> +    .qdev.size = sizeof(SysBusPicState2),
>>>>>>> +    .init = i8259_sysbus_init,
>>>>>>> +    .qdev.props = (Property[]) {
>>>>>>> +        DEFINE_PROP_END_OF_LIST()
>>>>>>> +    },
>>>>>>> +};
>>>>>>> +
>>>>>>> +static void i8259_register_devices(void)
>>>>>>> +{
>>>>>>> +   sysbus_register_withprop(&i8259_sysbus_info);
>>>>>>> }
>>>>>>> +
>>>>>>> +device_init(i8259_register_devices)
>>>>>>
>>>>>> This is obsolete. The i8259 has been significantly refactored (into two
>>>>>> ISA devices) and qdev'ified some moons ago.
>>>>>
>>>>> The reason we were discussing this was a circular dependency on PREP.
>>>>>
>>>>> The PIC is sitting on the ISA bus.
>>>>> The ISA bus is behind a PCI-ISA bridge
>>>>> the PCI-ISA bridge is behind a PCI host controller
>>>>> the PCI host controller needs interrupt lines in its initialization which 
>>>>> are attached to the PIC
>>>>>
>>>>> Any good ideas on how to resolve this? :)
>>>>
>>>> As we do this always: Split up initialization and IRQ line wiring.
>>>
>>> Well, yes, the theory is obvious. How would this look like in practice? To 
>>> create a PIC device I need a bus:
>>>
>>>    dev = isa_create(bus, "isa-i8259");
>>>
>>> But to create the bus, I need an interrupt line, which I only get after I 
>>> created the PIC device.
>>
>> ISA bus creation and IRQ assignment are split up IIRC.
> 
> So you're saying we should do the same for PCI?
> To create an ISA bus that sits behind a PCI device I first need to create a 
> PCI bus which is exposed by the host bridge which then again needs interrupt 
> lines.
> 
> I'm still puzzled how we would pass on irq lines then. I mean setting them 
> after init means that during init we can't instantiate other devices that we 
> can wire up to anything, right?

The ordering is:

1. create PCI bridge
   1.1. create ISA bus
2. create i8259
3. bind interrupts to i8259
4. create further ISA devices

All this can be part of the chipset instantiation. It is not today as we
reuse everything from 2. on for isapc. But that could likely be refactored.

Jan

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