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Re: [Qemu-devel] [PATCH 1/7] Introduce a new bus "ICC" to connect APIC


From: Anthony Liguori
Subject: Re: [Qemu-devel] [PATCH 1/7] Introduce a new bus "ICC" to connect APIC
Date: Thu, 16 Feb 2012 06:59:13 -0600
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On 02/16/2012 06:50 AM, Jan Kiszka wrote:
On 2012-02-16 13:42, Anthony Liguori wrote:
On 02/16/2012 05:25 AM, Jan Kiszka wrote:
On 2012-02-16 00:16, Igor Mammedov wrote:
Introduce a new structure CPUS as the controller of ICC (INTERRUPT
CONTROLLER COMMUNICATIONS), and new bus "ICC" to hold APIC,instead
of sysbus. So we can support APIC hot-plug feature.

This is repost of original patch for qemu-kvm rebased on current qemu:
http://lists.nongnu.org/archive/html/qemu-devel/2011-11/msg01478.html
All credits to Liu Ping Fan for writing it.

V2 changes:
    - cpusockets_init: cpu_sockets is not yet initialized, use cpus that
      we got as input param instead for qbus_create, this makes cpus
      apics visible in "info qtree" monitor command
    - fix format error spotted by Jan and missed by checkpatch
    - cpu_has_apic_feature: return bool instead of int


This patch surely no longer applies. And the ICC requires QOM conversion.

Also, post-QOM, I don't think having an ICC bus makes a whole lot of sense.

The LAPIC can be made a child of the CPU device with a bidirectional link.

We do have a bus here, the IO-APICs are attached to it as well.


Isn't that a bus protocol that's specific to the LAPICs/IO-APICs? I don't think that you would logically model the CPU as part of it.

I wonder if modeling inter-lapic communication via a bus is a bit overkill compared to what we do today (just a for() loop when needed).

Regards,

Anthony Liguori

 But we
can surely save that dummy cpusockets device.

Jan





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