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[Qemu-devel] [PATCH 3/7] cpu defs: use Intel flag names for Intel models
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PATCH 3/7] cpu defs: use Intel flag names for Intel models (v2) |
Date: |
Fri, 17 Feb 2012 14:41:21 -0200 |
Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models.
The flags have different names on Intel docs, so use those names for clarity.
This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <address@hidden>,
<http://marc.info/?l=qemu-devel&m=130618871926030>.
Changes v1 -> v2:
- Rebase patch against latest Qemu git tree
Signed-off-by: Eduardo Habkost <address@hidden>
---
sysconfigs/target/target-x86_64.conf | 6 +++---
target-i386/cpuid.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/sysconfigs/target/target-x86_64.conf
b/sysconfigs/target/target-x86_64.conf
index 6720778..09b255e 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -9,7 +9,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep
apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "ssse3 sse3"
- extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
+ extfeature_edx = "i64 fxsr mmx xd pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
@@ -23,7 +23,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep
apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "sse4.1 cx16 ssse3 sse3"
- extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
+ extfeature_edx = "i64 fxsr mmx xd pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
@@ -37,7 +37,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep
apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "popcnt sse4.2 sse4.1 cx16 ssse3 sse3"
- extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
+ extfeature_edx = "i64 fxsr mmx xd pat cmov pge syscall apic cx8 mce pae msr
tsc pse de fpu"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index aa19260..ace2a67 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -59,9 +59,9 @@ static const char *ext2_feature_name[] = {
"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
"mtrr", "pge", "mca", "cmov",
"pat", "pse36", NULL, NULL /* Linux mp */,
- "nx" /* Intel xd */, NULL, "mmxext", "mmx",
+ "nx|xd", NULL, "mmxext", "mmx",
"fxsr", "fxsr_opt|ffxsr", "pdpe1gb" /* AMD Page1GB */, "rdtscp",
- NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
+ NULL, "lm|i64", "3dnowext", "3dnow",
};
static const char *ext3_feature_name[] = {
"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD
ExtApicSpace */,
--
1.7.3.2
- [Qemu-devel] [PATCH 0/7] cpu model bug fixes and definition corrections (v3), Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 6/7] add Westmere as a qemu cpu model (v2), Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 7/7] cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1 (v2), Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 3/7] cpu defs: use Intel flag names for Intel models (v2),
Eduardo Habkost <=
- [Qemu-devel] [PATCH 4/7] cpu defs: add pse36, mca, mtrr to AMD CPU definitions (v2), Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 2/7] cpu flags: aliases: pclmuldq|pclmulqdq and ffxsr|fxsr_opt, Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 1/7] cpu models: reorder flag list to match bit order, Eduardo Habkost, 2012/02/17
- [Qemu-devel] [PATCH 5/7] cpu defs: remove replicated flags from Intel (v2), Eduardo Habkost, 2012/02/17
- Re: [Qemu-devel] [PATCH 0/7] cpu model bug fixes and definition corrections (v3), Anthony Liguori, 2012/02/24