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[Qemu-devel] [Bug 944753] [NEW] ARM: CORTEX M, PRIMASK and FAULTMASK are
From: |
Oleksiy Bondarenko |
Subject: |
[Qemu-devel] [Bug 944753] [NEW] ARM: CORTEX M, PRIMASK and FAULTMASK are misplaced, WINDOWS mingw 4.6.1 bug |
Date: |
Fri, 02 Mar 2012 12:25:51 -0000 |
Public bug reported:
Just want to warn anyone who hacks QEMU cortex M support under MinGW, it
seems there is a bug in gcc 4.6.1 that compiles this peace of code
wrong.
translate.c:
if (IS_M(env)) {
tmp = tcg_const_i32((insn & (1 << 4)) != 0);
/* PRIMASK */
if (insn & 2) {
addr = tcg_const_i32(16);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
/* FAULTMASK */
if (insn & 1) {
addr = tcg_const_i32(17);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
if we just switch conditions order it will compile OK
if (IS_M(env)) {
tmp = tcg_const_i32((insn & (1 << 4)) != 0);
/* FAULTMASK */
if (insn & 1) {
addr = tcg_const_i32(17);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
/* PRIMASK */
if (insn & 2) {
addr = tcg_const_i32(16);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
I have attached gdb disassembly in the attachment for both cases
** Affects: qemu
Importance: Undecided
Status: New
** Tags: arm cortexm windows
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https://bugs.launchpad.net/bugs/944753
Title:
ARM: CORTEX M, PRIMASK and FAULTMASK are misplaced, WINDOWS mingw
4.6.1 bug
Status in QEMU:
New
Bug description:
Just want to warn anyone who hacks QEMU cortex M support under MinGW,
it seems there is a bug in gcc 4.6.1 that compiles this peace of code
wrong.
translate.c:
if (IS_M(env)) {
tmp = tcg_const_i32((insn & (1 << 4)) != 0);
/* PRIMASK */
if (insn & 2) {
addr = tcg_const_i32(16);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
/* FAULTMASK */
if (insn & 1) {
addr = tcg_const_i32(17);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
if we just switch conditions order it will compile OK
if (IS_M(env)) {
tmp = tcg_const_i32((insn & (1 << 4)) != 0);
/* FAULTMASK */
if (insn & 1) {
addr = tcg_const_i32(17);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
/* PRIMASK */
if (insn & 2) {
addr = tcg_const_i32(16);
gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr);
}
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
I have attached gdb disassembly in the attachment for both cases
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