[Qemu-devel] [PATCH RFC v4 12/20] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset()

[Andreas Färber]

No other emulated CPU uses this at this time.

Signed-off-by: Andreas Färber <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: Andrzej Zaborowski <address@hidden>
---
 target-arm/cpu.c    |   14 ++++++++++++++
 target-arm/cpu.h    |    6 ------
 target-arm/helper.c |    8 --------
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 2f3190a..1614be4 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -233,8 +233,22 @@ static void pxa25x_class_init(ARMCPUClass *k, const 
ARMCPUInfo *info)
     set_class_feature(k, ARM_FEATURE_XSCALE);
 }
 
+static void pxa270_reset(CPUState *c)
+{
+    ARMCPU *cpu = ARM_CPU(c);
+    CPUARMState *env = &cpu->env;
+
+    arm_cpu_reset(c);
+
+    env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
+}
+
 static void pxa270_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
 {
+    CPUClass *cpu_class = CPU_CLASS(k);
+
+    cpu_class->reset = pxa270_reset;
+
     k->cp15.c0_cachetype = 0xd172172;
     k->cp15.c1_sys = 0x00000078;
 
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d7e73d8..d135221 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -406,12 +406,6 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #define ARM_CPUID_ARM926      0x41069265
 #define ARM_CPUID_TI915T      0x54029152
 #define ARM_CPUID_TI925T      0x54029252
-#define ARM_CPUID_PXA270_A0   0x69054110
-#define ARM_CPUID_PXA270_A1   0x69054111
-#define ARM_CPUID_PXA270_B0   0x69054112
-#define ARM_CPUID_PXA270_B1   0x69054113
-#define ARM_CPUID_PXA270_C0   0x69054114
-#define ARM_CPUID_PXA270_C5   0x69054117
 #define ARM_CPUID_ARM1136     0x4117b363
 #define ARM_CPUID_ARM1136_R2  0x4107b362
 #define ARM_CPUID_ARM1176     0x410fb767
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 46e9dc5..421ce98 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -71,14 +71,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c15_i_max = 0x000;
         env->cp15.c15_i_min = 0xff0;
         break;
-    case ARM_CPUID_PXA270_A0:
-    case ARM_CPUID_PXA270_A1:
-    case ARM_CPUID_PXA270_B0:
-    case ARM_CPUID_PXA270_B1:
-    case ARM_CPUID_PXA270_C0:
-    case ARM_CPUID_PXA270_C5:
-        env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
-        break;
     default:
         break;
     }
-- 
1.7.7