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[Qemu-devel] [PULL 0/3] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 0/3] target-arm queue |
Date: |
Fri, 16 Mar 2012 18:21:43 +0000 |
Hi; this is a pullreq for my target-arm queue. Just three fairly
minor bug fixes this time. Please pull.
Thanks
-- PMM
The following changes since commit ae7d54d489540b49b7c13a7df7ddc220588a2ced:
target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef (2012-03-14
19:48:37 -0500)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream
Peter Maydell (3):
target-arm: Fix typo in ARM946 cp15 c5 handling
target-arm: Clear IT bits when taking exceptions in v7M
target-arm: Decode SETEND correctly in Thumb
target-arm/helper.c | 5 ++-
target-arm/translate.c | 63 ++++++++++++++++++++++++++++++-----------------
2 files changed, 43 insertions(+), 25 deletions(-)
- [Qemu-devel] [PULL 0/3] target-arm queue,
Peter Maydell <=