Re: [Qemu-devel] [PATCH V2 0/4] MIPS ASE DSP Support for Qemu

[陳韋任]

> It would be better to break it up as patches each of
> which adds support for a coherent bite-sized subset of
> these instructions (so each individual patch includes
> the helper function declaration, implementation and
> translate.c changes for a smaller number of instructions).

  I am reading MIPS ASE DSP manual [1]. I think you can group those instructions
as "Chapter 4. MIPS DSP ASE Instruction Summary" does. So you might have
following patches,

  [1/] MIPS ASE DSP Support - Arithmetic Sub-class (~50 ins)
  [2/] MIPS ASE DSP Support - GPR-Based Shift Sub-class (~22 ins)
  [3/] MIPS ASE DSP Support - Multiply Sub-class (~38 ins)
  [4/] MIPS ASE DSP Support - Bit/ Manipulation Sub-class (~6 ins)
  [5/] MIPS ASE DSP Support - Compare-Pick Sub-class (~18 ins)
  [6/] MIPS ASE DSP Support - Accumulator and DSPControl Access Sub-class (~21 
ins)
  [7/] MIPS ASE DSP Support - Indexed-Load and Branch Sub-class (4 ins)
  [8/] MIPS ASE DSP Testcase

You can combine smaller subsets into a bigger one to make each patch equally
sized. Each patch adding MIPS ASE DSP support should be self-contained, which
means you can apply (and compile) them one-by-one, no error occured. I think
testcase for all ASE DSP instructions can be just one patch.

Regards,
chenwj

[1] MIPS32® Architecture for Programmers VolumeIV-e: The MIPS® DSP
    Application-Specific Extension to the MIPS32®Architecture
    http://www.mips.com/products/product-materials/processor/mips-architecture/

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj