qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 2/2] hw/exynos4210.c: Use new IRQ Gate propertie


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH 2/2] hw/exynos4210.c: Use new IRQ Gate properties.
Date: Wed, 11 Apr 2012 16:29:03 +0100

On 11 April 2012 08:18, Evgeny Voevodin <address@hidden> wrote:
> Signed-off-by: Evgeny Voevodin <address@hidden>
> ---
>  hw/exynos4210.c |    6 ++++--
>  1 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/hw/exynos4210.c b/hw/exynos4210.c
> index f904370..088e96e 100644
> --- a/hw/exynos4210.c
> +++ b/hw/exynos4210.c
> @@ -98,6 +98,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
>
>     /* IRQ Gate */
>     dev = qdev_create(NULL, "exynos4210.irq_gate");
> +    qdev_prop_set_uint32(dev, "n_out", EXYNOS4210_NCPUS);
> +    qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS);
>     qdev_init_nofail(dev);
>     /* Get IRQ Gate input in gate_irq */
>     for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
> @@ -116,7 +118,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
>     busdev = sysbus_from_qdev(dev);
>     sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
>     for (n = 0; n < EXYNOS4210_NCPUS; n++) {
> -        sysbus_connect_irq(busdev, n, gate_irq[n * 2]);
> +        sysbus_connect_irq(busdev, n, gate_irq[n * 4]);
>     }
>     for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) {
>         s->irqs.int_gic_irq[n] = qdev_get_gpio_in(dev, n);
> @@ -135,7 +137,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
>     /* Map Distributer interface */
>     sysbus_mmio_map(busdev, 1, EXYNOS4210_EXT_GIC_DIST_BASE_ADDR);
>     for (n = 0; n < EXYNOS4210_NCPUS; n++) {
> -        sysbus_connect_irq(busdev, n, gate_irq[n * 2 + 1]);
> +        sysbus_connect_irq(busdev, n, gate_irq[n * 4 + 1]);
>     }
>     for (n = 0; n < EXYNOS4210_EXT_GIC_NIRQ; n++) {
>         s->irqs.ext_gic_irq[n] = qdev_get_gpio_in(dev, n);

Why do these sysbus_connect_irq() calls have to change?
Isn't the wiring of the gate the same before and afterwards?

Also, since in patch 1 the default number of inputs and outputs
for the gate is now 1, this means the exynos4 platform is broken
between the two patches because it will be trying to wire up
a gate with too few inputs/outputs. You might need to merge
the two patches together to avoid that.

-- PMM



reply via email to

[Prev in Thread] Current Thread [Next in Thread]