qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH v2 00/14] target-arm: Create QOM subclass per CPU im


From: Peter Maydell
Subject: [Qemu-devel] [PATCH v2 00/14] target-arm: Create QOM subclass per CPU implementation
Date: Sat, 14 Apr 2012 17:42:09 +0100

This patch series builds on Andreas' basic QOMification of the ARM
CPU by creating a QOM subclass for each ARM CPU implementation
(926,1176,A8,etc). We can then move the setup of feature bits, register
reset values, constant ID register values, etc, from the big switch
statement in cpu_reset_model_id() into the per-cpu init function.
This allows us to:
 * drop that big switch completely
 * get rid of the ugly "copy values across the memset" code we had
   for a few CPUARMState fields
 * remove the nasty implicit dependency on reset function ordering
   we were using on the Highbank board
 * easily make some of these fields QOM properties in future (this
   needs support for a realize method first, though)

Changes v1->v2:
 * drop unneeded memset in arm_cpu_initfn
 * set env->cpu_model_str in cpu_arm_init, not arm_cpu_initfn
 * s/type/type_info/ in cpu_register
 * arm_cpu_class_init is the class initfn for ARM_CPU, not the
   per-implementation subclasses
 * dropped unnecessary include of cpu-qom.h
 * handle "pxa270" alias by an extra entry in the initfn table,
   so it appears in the '-cpu ?' list
 * rename arm_cpu_postconfig_init to arm_cpu_realize, and
   call once from cpu_arm_init rather than from each subclass's
   init function. This should become a proper realize function
   once we have support for that.
 * improved comment about new fields in ARMCPU struct
 * dropped unnecessary include of cpu-qom.h in hw/highbank.c
 * fixed bug which broke linux-user mode between patches 1 and 12:
   we were using the (initially zero) value of env->cp15.c0_cpuid
   rather than cpu->midr when calling cpu_reset_model_id();
   this meant linux-user never ran cpu_reset_model_id and none of
   the feature bits got set. System mode happened to work because
   we actually reset the CPU twice during startup...
 * reinstate all the feature bit settings for cpu 'any' which were
   accidentally dropped in moving them into initfns in v1...

Peter Maydell (14):
  target-arm: Add QOM subclasses for each ARM cpu implementation
  target-arm: Move feature bit settings to CPU init fns
  target-arm: Move FPSID config to cpu init fns
  target-arm: Move MVFR* setup to per cpu init fns
  target-arm: Move CTR setup to per cpu init fns
  target-arm: Move SCTLR reset value setup to per cpu init fns
  target-arm: Drop JTAG_ID documentation
  target-arm: Move iWMMXT wCID reset to cpu_state_reset
  target-arm: Move feature register setup to per-CPU init fns
  target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
  target-arm: Move cache ID register setup to cpu specific init fns
  target-arm: Drop cpu_reset_model_id()
  target-arm: Move reset handling to arm_cpu_reset
  target-arm: Move A9 config_base_address reset value to ARMCPU

 hw/highbank.c        |   11 +-
 target-arm/cpu-qom.h |   38 +++
 target-arm/cpu.c     |  624 +++++++++++++++++++++++++++++++++++++++++++++++++-
 target-arm/cpu.h     |    6 +-
 target-arm/helper.c  |  446 ++++--------------------------------
 5 files changed, 709 insertions(+), 416 deletions(-)




reply via email to

[Prev in Thread] Current Thread [Next in Thread]