[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [Bug 982321] Re: User mode arm qemu segfault
From: |
Serge Schneider |
Subject: |
[Qemu-devel] [Bug 982321] Re: User mode arm qemu segfault |
Date: |
Sun, 15 Apr 2012 13:34:32 -0000 |
** Attachment added: "log"
https://bugs.launchpad.net/bugs/982321/+attachment/3071027/+files/SLidNn8F.txt
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/982321
Title:
User mode arm qemu segfault
Status in QEMU:
New
Bug description:
The full error is attached.
Fixed by using downgrading to 0bcd08b3522e4feffe3111e7c8145f62d32cc1fb
Did some regression testing and found that this commit is the problem:
dec9c2d4306d7b4f8ffff482ac42dc468ed2a61d is the first bad commit
commit dec9c2d4306d7b4f8ffff482ac42dc468ed2a61d
Author: Andreas F��rber <address@hidden>
Date: Thu Mar 29 04:50:31 2012 +0000
target-arm: Minimalistic CPU QOM'ification
Introduce only one non-abstract type TYPE_ARM_CPU and do not touch
cp15 registers to not interfere with Peter's ongoing remodelling.
Embed CPUARMState as first (additional) field of ARMCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas F��rber <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
:100644 100644 44b2e83e6f1d392161b459f582989dede6dc62c3
6e8b997bc5b78262d6ea822138839d1a9e7bb3f3 M Makefile.target
:040000 040000 fe4fbaf514bb3121d6c320b5cd63b855e040fc38
fe2555ad071f036eb4173347ff2f887f23e7d633 M target-arm
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/982321/+subscriptions
- [Qemu-devel] [PATCH 00/32] target-arm: refactor copro register implementation, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 06/32] target-arm: Add register_cp_regs_for_features(), Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 10/32] target-arm: Convert TLS registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 01/32] target-arm: initial coprocessor register framework, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 27/32] target-arm: Convert MPIDR, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 25/32] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 26/32] target-arm: Convert cp15 cache ID registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 16/32] target-arm: Convert cp15 crn=13 registers, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 29/32] target-arm: Remove c0_cachetype CPUARMState field, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 05/32] target-arm: Remove old cpu_arm_set_cp_io infrastructure, Peter Maydell, 2012/04/15
- [Qemu-devel] [PATCH 11/32] target-arm: Convert performance monitor registers, Peter Maydell, 2012/04/15