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Re: [Qemu-devel] [PATCH v7 15/16] target-or32: Add linux user support
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH v7 15/16] target-or32: Add linux user support |
Date: |
Wed, 27 Jun 2012 18:00:40 +0000 |
On Wed, Jun 27, 2012 at 9:54 AM, Jia Liu <address@hidden> wrote:
> Add QEMU OpenRISC linux user support.
>
> Signed-off-by: Jia Liu <address@hidden>
> ---
> configure | 1 +
> default-configs/or32-linux-user.mak | 1 +
> linux-user/elfload.c | 41 +++++++
> linux-user/main.c | 100 +++++++++++++++
> linux-user/signal.c | 229
> +++++++++++++++++++++++++++++++++++
> linux-user/syscall.c | 2 +-
> linux-user/syscall_defs.h | 40 +++++-
> target-openrisc/cpu.h | 12 ++
> 8 files changed, 422 insertions(+), 4 deletions(-)
> create mode 100644 default-configs/or32-linux-user.mak
>
> diff --git a/configure b/configure
> index 166a854..593f1d3 100755
> --- a/configure
> +++ b/configure
> @@ -956,6 +956,7 @@ microblaze-linux-user \
> microblazeel-linux-user \
> mips-linux-user \
> mipsel-linux-user \
> +or32-linux-user \
> ppc-linux-user \
> ppc64-linux-user \
> ppc64abi32-linux-user \
> diff --git a/default-configs/or32-linux-user.mak
> b/default-configs/or32-linux-user.mak
> new file mode 100644
> index 0000000..808c1f9
> --- /dev/null
> +++ b/default-configs/or32-linux-user.mak
> @@ -0,0 +1 @@
> +# Default configuration for or32-linux-user
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index f3b1552..6b622d4 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -787,6 +787,47 @@ static void elf_core_copy_regs(target_elf_gregset_t
> *regs, const CPUMBState *env
>
> #endif /* TARGET_MICROBLAZE */
>
> +#ifdef TARGET_OPENRISC
> +
> +#define ELF_START_MMAP 0x08000000
> +
> +#define elf_check_arch(x) ((x) == EM_OPENRISC)
> +
> +#define ELF_ARCH EM_OPENRISC
> +#define ELF_CLASS ELFCLASS32
> +#define ELF_DATA ELFDATA2MSB
> +
> +static inline void init_thread(struct target_pt_regs *regs,
> + struct image_info *infop)
> +{
> + regs->pc = infop->entry;
> + regs->gpr[1] = infop->start_stack;
> +}
> +
> +#define USE_ELF_CORE_DUMP
> +#define ELF_EXEC_PAGESIZE 8192
> +
> +/* See linux kernel arch/openrisc/include/asm/elf.h. */
> +#define ELF_NREG 34 /* gprs and pc, sr */
> +typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
> +
> +static void elf_core_copy_regs(target_elf_gregset_t *regs,
> + const CPUOpenRISCState *env)
> +{
> + int i;
> +
> + for (i = 0; i < 32; i++) {
> + (*regs)[i] = tswapl(env->gpr[i]);
> + }
> +
> + (*regs)[32] = tswapl(env->pc);
> + (*regs)[33] = tswapl(env->sr);
> +}
> +#define ELF_HWCAP 0
> +#define ELF_PLATFORM NULL
> +
> +#endif /* TARGET_OPENRISC */
> +
> #ifdef TARGET_SH4
>
> #define ELF_START_MMAP 0x80000000
> diff --git a/linux-user/main.c b/linux-user/main.c
> index d0e0e4f..7ed897d 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -2306,6 +2306,93 @@ done_syscall:
> }
> #endif
>
> +#ifdef TARGET_OPENRISC
> +
> +void cpu_loop(CPUOpenRISCState *env)
> +{
> + int trapnr, gdbsig;
> +
> + for (;;) {
> + trapnr = cpu_exec(env);
> + gdbsig = 0;
> +
> + switch (trapnr) {
> + case EXCP_RESET:
> + fprintf(stderr, "\nReset request, exit, pc is %#x\n", env->pc);
> + exit(1);
> + break;
> + case EXCP_BUSERR:
> + fprintf(stderr, "\nBus error, exit, pc is %#x\n", env->pc);
> + gdbsig = SIGBUS;
> + break;
> + case EXCP_DPF:
> + case EXCP_IPF:
> + cpu_dump_state(env, stderr, fprintf, 0);
> + gdbsig = TARGET_SIGSEGV;
> + break;
> + case EXCP_TICK:
> + fprintf(stderr, "\nTick time interrupt pc is %#x\n", env->pc);
> + break;
> + case EXCP_ALIGN:
> + fprintf(stderr, "\nAlignment pc is %#x\n", env->pc);
> + gdbsig = SIGBUS;
> + break;
> + case EXCP_ILLEGAL:
> + fprintf(stderr, "\nIllegal instructionpc is %#x\n", env->pc);
> + gdbsig = SIGILL;
> + break;
> + case EXCP_INT:
> + fprintf(stderr, "\nExternal interruptpc is %#x\n", env->pc);
> + break;
> + case EXCP_DTLBMISS:
> + case EXCP_ITLBMISS:
> + printf("TLB miss\n");
> + break;
> + case EXCP_RANGE:
> + fprintf(stderr, "\nRange\n");
> + gdbsig = SIGSEGV;
> + break;
> + case EXCP_SYSCALL:
> + env->pc += 4; /* 0xc00; */
> + env->gpr[11] = do_syscall(env,
> + env->gpr[11], /* return value */
> + env->gpr[3], /* r3 - r7 are params */
> + env->gpr[4],
> + env->gpr[5],
> + env->gpr[6],
> + env->gpr[7],
> + env->gpr[8], 0, 0);
> + break;
> + case EXCP_FPE:
> + fprintf(stderr, "Floating point error\n");
> + break;
> + case EXCP_TRAP:
> + fprintf(stderr, "Trap\n");
> + gdbsig = SIGTRAP;
> + break;
> + case EXCP_NR:
> + fprintf(stderr, "NR\n");
The above non-fatal fprintfs and printfs should be converted to
DPRINTFs, tracepoints or qemu_log(LOG_UNIMP) or simply removed.
> + break;
> + default:
> + fprintf(stderr, "qemu: unhandled CPU exception %#x -
> aborting\n", \
> + trapnr);
> + cpu_dump_state(env, stderr, fprintf, 0);
> + gdbsig = TARGET_SIGILL;
> + break;
> + }
> + if (gdbsig) {
> + gdb_handlesig(env, gdbsig);
> + if (gdbsig != TARGET_SIGTRAP) {
> + exit(1);
> + }
> + }
> +
> + process_pending_signals(env);
> + }
> +}
> +
> +#endif /* TARGET_OPENRISC */
> +
> #ifdef TARGET_SH4
> void cpu_loop(CPUSH4State *env)
> {
> @@ -3386,6 +3473,8 @@ int main(int argc, char **argv, char **envp)
> #else
> cpu_model = "24Kf";
> #endif
> +#elif defined TARGET_OPENRISC
> + cpu_model = "or1200";
> #elif defined(TARGET_PPC)
> #ifdef TARGET_PPC64
> cpu_model = "970fx";
> @@ -3788,6 +3877,17 @@ int main(int argc, char **argv, char **envp)
> env->hflags |= MIPS_HFLAG_M16;
> }
> }
> +#elif defined(TARGET_OPENRISC)
> + {
> + int i;
> +
> + for (i = 0; i < 32; i++) {
> + env->gpr[i] = regs->gpr[i];
> + }
> +
> + env->sr = regs->sr;
> + env->pc = regs->pc;
> + }
> #elif defined(TARGET_SH4)
> {
> int i;
> diff --git a/linux-user/signal.c b/linux-user/signal.c
> index 43346dc..85846d4 100644
> --- a/linux-user/signal.c
> +++ b/linux-user/signal.c
> @@ -3629,6 +3629,235 @@ long do_rt_sigreturn(CPUCRISState *env)
> return -TARGET_ENOSYS;
> }
>
> +#elif defined(TARGET_OPENRISC)
> +
> +struct target_sigcontext {
> + struct target_pt_regs regs;
> + abi_ulong oldmask;
> + abi_ulong usp;
> +};
> +
> +struct target_ucontext {
> + abi_ulong tuc_flags;
> + abi_ulong tuc_link;
> + target_stack_t tuc_stack;
> + struct target_sigcontext tuc_mcontext;
> + target_sigset_t tuc_sigmask; /* mask last for extensibility */
> +};
> +
> +struct target_rt_sigframe {
> + abi_ulong pinfo;
> + uint64_t puc;
> + struct target_siginfo info;
> + struct target_sigcontext sc;
> + struct target_ucontext uc;
> + unsigned char retcode[16]; /* trampoline code */
> +};
> +
> +/* This is the asm-generic/ucontext.h version */
> +#if 0
> +static int restore_sigcontext(CPUOpenRISCState *regs,
> + struct target_sigcontext *sc)
> +{
> + unsigned int err = 0;
> + unsigned long old_usp;
> +
> + /* Alwys make any pending restarted system call return -EINTR */
> + current_thread_info()->restart_block.fn = do_no_restart_syscall;
> +
> + /* restore the regs from &sc->regs (same as sc, since regs is first)
> + * (sc is already checked for VERIFY_READ since the sigframe was
> + * checked in sys_sigreturn previously)
> + */
> +
> + if (copy_from_user(regs, &sc, sizeof(struct target_pt_regs))) {
> + goto badframe;
> + }
> +
> + /* make sure the U-flag is set so user-mode cannot fool us */
> +
> + regs->sr &= ~SR_SM;
> +
> + /* restore the old USP as it was before we stacked the sc etc.
> + * (we cannot just pop the sigcontext since we aligned the sp and
> + * stuff after pushing it)
> + */
> +
> + err |= __get_user(old_usp, &sc->usp);
> + phx_signal("old_usp 0x%lx", old_usp);
> +
> + __PHX__ REALLY /* ??? */
> + wrusp(old_usp);
> + regs->gpr[1] = old_usp;
> +
> + /* TODO: the other ports use regs->orig_XX to disable syscall checks
> + * after this completes, but we don't use that mechanism. maybe we can
> + * use it now ?
> + */
> +
> + return err;
> +
> +badframe:
> + return 1;
> +}
> +#endif
> +
> +/* Set up a signal frame. */
> +
> +static int setup_sigcontext(struct target_sigcontext *sc,
> + CPUOpenRISCState *regs,
> + unsigned long mask)
> +{
> + int err = 0;
> + unsigned long usp = regs->gpr[1];
> +
> + /* copy the regs. they are first in sc so we can use sc directly */
> +
> + /*err |= copy_to_user(&sc, regs, sizeof(struct target_pt_regs));*/
> +
> + /* Set the frametype to CRIS_FRAME_NORMAL for the execution of
> + the signal handler. The frametype will be restored to its previous
> + value in restore_sigcontext. */
> + /*regs->frametype = CRIS_FRAME_NORMAL;*/
> +
> + /* then some other stuff */
> + err |= __put_user(mask, &sc->oldmask);
> + err |= __put_user(usp, &sc->usp); return err;
> +}
> +
> +static inline unsigned long align_sigframe(unsigned long sp)
> +{
> + unsigned long i;
> + i = sp & ~3UL;
> + return i;
> +}
> +
> +static inline abi_ulong get_sigframe(struct target_sigaction *ka,
> + CPUOpenRISCState *regs,
> + size_t frame_size)
> +{
> + unsigned long sp = regs->gpr[1];
> + int onsigstack = on_sig_stack(sp);
> +
> + /* redzone */
> + /* This is the X/Open sanctioned signal stack switching. */
> + if ((ka->sa_flags & SA_ONSTACK) != 0 && !onsigstack) {
> + sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size;
> + }
> +
> + sp = align_sigframe(sp - frame_size);
> +
> + /*
> + * If we are on the alternate signal stack and would overflow it, don't.
> + * Return an always-bogus address instead so we will die with SIGSEGV.
> + */
> +
> + if (onsigstack && !likely(on_sig_stack(sp))) {
> + return -1L;
> + }
> +
> + return sp;
> +}
> +
> +static void setup_frame(int sig, struct target_sigaction *ka,
> + target_sigset_t *set, CPUOpenRISCState *env)
> +{
> + printf("Not implement.\n");
> +}
> +
> +static void setup_rt_frame(int sig, struct target_sigaction *ka,
> + target_siginfo_t *info,
> + target_sigset_t *set, CPUOpenRISCState *env)
> +{
> + int err = 0;
> + abi_ulong frame_addr;
> + unsigned long return_ip;
> + struct target_rt_sigframe *frame;
> + abi_ulong info_addr, uc_addr;
> +
> + frame_addr = get_sigframe(ka, env, sizeof *frame);
> +
> + frame_addr = get_sigframe(ka, env, sizeof(*frame));
> + if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) {
> + goto give_sigsegv;
> + }
> +
> + info_addr = frame_addr + offsetof(struct target_rt_sigframe, info);
> + err |= __put_user(info_addr, &frame->pinfo);
> + uc_addr = frame_addr + offsetof(struct target_rt_sigframe, uc);
> + err |= __put_user(uc_addr, &frame->puc);
> +
> + if (ka->sa_flags & SA_SIGINFO) {
> + err |= copy_siginfo_to_user(&frame->info, info);
> + }
> + if (err) {
> + goto give_sigsegv;
> + }
> +
> + /*err |= __clear_user(&frame->uc, offsetof(struct ucontext,
> uc_mcontext));*/
> + err |= __put_user(0, &frame->uc.tuc_flags);
> + err |= __put_user(0, &frame->uc.tuc_link);
> + err |= __put_user(target_sigaltstack_used.ss_sp,
> + &frame->uc.tuc_stack.ss_sp);
> + err |= __put_user(sas_ss_flags(env->gpr[1]),
> &frame->uc.tuc_stack.ss_flags);
> + err |= __put_user(target_sigaltstack_used.ss_size,
> + &frame->uc.tuc_stack.ss_size);
> + err |= setup_sigcontext(&frame->sc, env, set->sig[0]);
> +
> + /*err |= copy_to_user(frame->uc.tuc_sigmask, set, sizeof(*set));*/
> +
> + if (err) {
> + goto give_sigsegv;
> + }
> +
> + /* trampoline - the desired return ip is the retcode itself */
> + return_ip = (unsigned long)&frame->retcode;
> + /* This is l.ori r11,r0,__NR_sigreturn, l.sys 1 */
> + err |= __put_user(0xa960, (short *)(frame->retcode + 0));
> + err |= __put_user(TARGET_NR_rt_sigreturn, (short *)(frame->retcode + 2));
> + err |= __put_user(0x20000001, (unsigned long *)(frame->retcode + 4));
> + err |= __put_user(0x15000000, (unsigned long *)(frame->retcode + 8));
> +
> + if (err) {
> + goto give_sigsegv;
> + }
> +
> + /* TODO what is the current->exec_domain stuff and invmap ? */
> +
> + /* Set up registers for signal handler */
> + env->pc = (unsigned long)ka->_sa_handler; /* what we enter NOW */
> + env->gpr[9] = (unsigned long)return_ip; /* what we enter LATER */
> + env->gpr[3] = (unsigned long)sig; /* arg 1: signo */
> + env->gpr[4] = (unsigned long)&frame->info; /* arg 2: (siginfo_t*) */
> + env->gpr[5] = (unsigned long)&frame->uc; /* arg 3: ucontext */
> +
> + /* actually move the usp to reflect the stacked frame */
> + env->gpr[1] = (unsigned long)frame;
> +
> + return;
> +
> +give_sigsegv:
> + unlock_user_struct(frame, frame_addr, 1);
> + if (sig == TARGET_SIGSEGV) {
> + ka->_sa_handler = TARGET_SIG_DFL;
> + }
> + force_sig(TARGET_SIGSEGV);
> +}
> +
> +long do_sigreturn(CPUOpenRISCState *env)
> +{
> +
> + fprintf(stderr, "do_sigreturn: not implemented\n");
> + return -TARGET_ENOSYS;
> +}
> +
> +long do_rt_sigreturn(CPUOpenRISCState *env)
> +{
> + fprintf(stderr, "do_rt_sigreturn: not implemented\n");
> + return -TARGET_ENOSYS;
> +}
> +/* TARGET_OPENRISC */
> +
> #elif defined(TARGET_S390X)
>
> #define __NUM_GPRS 16
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 539af3f..630a455 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -7377,7 +7377,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long
> arg1,
> case TARGET_NR_sigaltstack:
> #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_MIPS) || \
> defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_ALPHA) || \
> - defined(TARGET_M68K) || defined(TARGET_S390X)
> + defined(TARGET_M68K) || defined(TARGET_S390X) || defined(TARGET_OPENRISC)
> ret = do_sigaltstack(arg1, arg2, get_sp_from_cpustate((CPUArchState
> *)cpu_env));
> break;
> #else
> diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
> index a79b67d..cfece21 100644
> --- a/linux-user/syscall_defs.h
> +++ b/linux-user/syscall_defs.h
> @@ -59,7 +59,7 @@
>
> #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \
> || defined(TARGET_M68K) || defined(TARGET_CRIS) ||
> defined(TARGET_UNICORE32) \
> - || defined(TARGET_S390X)
> + || defined(TARGET_S390X) || defined(TARGET_OPENRISC)
>
> #define TARGET_IOC_SIZEBITS 14
> #define TARGET_IOC_DIRBITS 2
> @@ -323,7 +323,7 @@ int do_sigaction(int sig, const struct target_sigaction
> *act,
> || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined(TARGET_SH4) \
> || defined(TARGET_M68K) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) \
> || defined(TARGET_MICROBLAZE) || defined(TARGET_UNICORE32) \
> - || defined(TARGET_S390X)
> + || defined(TARGET_S390X) || defined(TARGET_OPENRISC)
>
> #if defined(TARGET_SPARC)
> #define TARGET_SA_NOCLDSTOP 8u
> @@ -344,6 +344,14 @@ int do_sigaction(int sig, const struct target_sigaction
> *act,
> #if !defined(TARGET_ABI_MIPSN32) && !defined(TARGET_ABI_MIPSN64)
> #define TARGET_SA_RESTORER 0x04000000 /* Only for O32 */
> #endif
> +#elif defined(TARGET_OPENRISC)
> +#define TARGET_SA_NOCLDSTOP 0x00000001
> +#define TARGET_SA_NOCLDWAIT 0x00000002
> +#define TARGET_SA_SIGINFO 0x00000004
> +#define TARGET_SA_ONSTACK 0x08000000
> +#define TARGET_SA_RESTART 0x10000000
> +#define TARGET_SA_NODEFER 0x40000000
> +#define TARGET_SA_RESETHAND 0x80000000
> #elif defined(TARGET_ALPHA)
> #define TARGET_SA_ONSTACK 0x00000001
> #define TARGET_SA_RESTART 0x00000002
> @@ -448,6 +456,7 @@ int do_sigaction(int sig, const struct target_sigaction
> *act,
>
> #else
>
> +/* OpenRISC Using the general signals */
> #define TARGET_SIGHUP 1
> #define TARGET_SIGINT 2
> #define TARGET_SIGQUIT 3
> @@ -1086,7 +1095,8 @@ struct target_winsize {
> #endif
>
> #if (defined(TARGET_I386) && defined(TARGET_ABI32)) || defined(TARGET_ARM) \
> - || defined(TARGET_CRIS) || defined(TARGET_UNICORE32)
> + || defined(TARGET_CRIS) || defined(TARGET_UNICORE32) \
> + || defined(TARGET_OPENRISC)
> struct target_stat {
> unsigned short st_dev;
> unsigned short __pad1;
> @@ -1783,6 +1793,30 @@ struct target_stat {
> abi_long st_blocks;
> abi_ulong __unused[3];
> };
> +#elif defined(TARGET_OPENRISC)
> +struct target_stat {
> + abi_ulong st_dev;
> + abi_ulong st_ino;
> + abi_ulong st_nlink;
> +
> + unsigned int st_mode;
> + unsigned int st_uid;
> + unsigned int st_gid;
> + unsigned int __pad0;
> + abi_ulong st_rdev;
> + abi_long st_size;
> + abi_long st_blksize;
> + abi_long st_blocks; /* Number 512-byte blocks allocated. */
> +
> + abi_ulong target_st_atime;
> + abi_ulong target_st_atime_nsec;
> + abi_ulong target_st_mtime;
> + abi_ulong target_st_mtime_nsec;
> + abi_ulong target_st_ctime;
> + abi_ulong target_st_ctime_nsec;
> +
> + abi_long __unused[3];
> +};
> #else
> #error unsupported CPU
> #endif
> diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
> index d499dc4..34dd844 100644
> --- a/target-openrisc/cpu.h
> +++ b/target-openrisc/cpu.h
> @@ -364,11 +364,13 @@ void do_interrupt(CPUOpenRISCState *env);
> void openrisc_translate_init(void);
> int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong
> address,
> int rw, int mmu_idx);
> +int cpu_openrisc_signal_handler(int host_signum, void *pinfo, void *puc);
>
> #define cpu_list cpu_openrisc_list
> #define cpu_exec cpu_openrisc_exec
> #define cpu_gen_code cpu_openrisc_gen_code
> #define cpu_handle_mmu_fault cpu_openrisc_handle_mmu_fault
> +#define cpu_signal_handler cpu_openrisc_signal_handler
>
> #define CPU_SAVE_VERSION 1
>
> @@ -400,6 +402,16 @@ static inline CPUOpenRISCState *cpu_init(const char
> *cpu_model)
> return NULL;
> }
>
> +#if defined(CONFIG_USER_ONLY)
> +static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
> +{
> + if (newsp) {
> + env->gpr[1] = newsp;
> + }
> + env->gpr[2] = 0;
> +}
> +#endif
> +
> #include "cpu-all.h"
>
> static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env,
> --
> 1.7.9.5
>
>
- Re: [Qemu-devel] [PATCH v7 11/16] target-or32: Add a IIS dummy board, (continued)
[Qemu-devel] [PATCH v7 12/16] target-or32: Add system instructions, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 13/16] target-or32: Add gdb stub, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 16/16] target-or32: Add testcases, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 14/16] target-or32: Add linux syscall, signal and termbits, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 09/16] target-or32: Add PIC support, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 10/16] target-or32: Add timer support, Jia Liu, 2012/06/27
[Qemu-devel] [PATCH v7 15/16] target-or32: Add linux user support, Jia Liu, 2012/06/27
- Re: [Qemu-devel] [PATCH v7 15/16] target-or32: Add linux user support,
Blue Swirl <=