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Re: [Qemu-devel] [SeaBIOS PATCH 1/2] acpi: report real I/O APIC ID (0) o
From: |
Gleb Natapov |
Subject: |
Re: [Qemu-devel] [SeaBIOS PATCH 1/2] acpi: report real I/O APIC ID (0) on MADT table (v2) |
Date: |
Mon, 23 Jul 2012 15:16:30 +0300 |
On Fri, Jul 20, 2012 at 02:04:49PM -0300, Eduardo Habkost wrote:
> When resetting an I/O APIC, its ID is set to 0, and SeaBIOS doesn't
> change it, so report it correctly on the MADT table.
>
> Some hardware may require the BIOS to initialize I/O APIC ID to an
> unique value, but SeaBIOS doesn't do that. This patch at least makes the
> MADT table reflect reality.
>
> Changes v1 -> v2:
> - Cosmetic: whitespace change (removed extra newline)
> - New patch description
>
> Signed-off-by: Eduardo Habkost <address@hidden>
> ---
> src/acpi.c | 2 +-
> src/config.h | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/acpi.c b/src/acpi.c
> index d39cbd9..da3bc57 100644
> --- a/src/acpi.c
> +++ b/src/acpi.c
> @@ -336,7 +336,7 @@ build_madt(void)
> struct madt_io_apic *io_apic = (void*)apic;
> io_apic->type = APIC_IO;
> io_apic->length = sizeof(*io_apic);
> - io_apic->io_apic_id = CountCPUs;
> + io_apic->io_apic_id = BUILD_IOAPIC_ID;
> io_apic->address = cpu_to_le32(BUILD_IOAPIC_ADDR);
> io_apic->interrupt = cpu_to_le32(0);
>
mptable also have ioapic_id.
> diff --git a/src/config.h b/src/config.h
> index 3a70867..0d4066d 100644
> --- a/src/config.h
> +++ b/src/config.h
> @@ -52,6 +52,7 @@
> #define BUILD_PCIMEM64_END 0x10000000000ULL
>
> #define BUILD_IOAPIC_ADDR 0xfec00000
> +#define BUILD_IOAPIC_ID 0
> #define BUILD_HPET_ADDRESS 0xfed00000
> #define BUILD_APIC_ADDR 0xfee00000
>
> --
> 1.7.10.4
--
Gleb.
- [Qemu-devel] [SeaBIOS PATCH 0/2] Allow non-contiguous APIC IDs (v2), Eduardo Habkost, 2012/07/20
- [Qemu-devel] [SeaBIOS PATCH 1/2] acpi: report real I/O APIC ID (0) on MADT table (v2), Eduardo Habkost, 2012/07/20
- Re: [Qemu-devel] [SeaBIOS PATCH 1/2] acpi: report real I/O APIC ID (0) on MADT table (v2),
Gleb Natapov <=
- [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Eduardo Habkost, 2012/07/20
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Gleb Natapov, 2012/07/23
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Eduardo Habkost, 2012/07/25
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Gleb Natapov, 2012/07/26
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Eduardo Habkost, 2012/07/26
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Avi Kivity, 2012/07/26
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Eduardo Habkost, 2012/07/26
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Avi Kivity, 2012/07/26
- Re: [Qemu-devel] [SeaBIOS PATCH 2/2] allow CPUs to have non-contiguous Local APIC IDs (v2), Eduardo Habkost, 2012/07/26