Re: [Qemu-devel] [PATCH] target-mips: Enable access to required RDHWR hardware registers

[Andreas Färber]

Am 21.08.2012 01:41, schrieb Meador Inge:
> While running in the usermode emulator all of the MIPS32r2 *required*
> RDHWR hardware registers should be accessible (the Linux kernel enables
> access to these same registers).
> 
> Signed-off-by: Meador Inge <address@hidden>
> ---
>  target-mips/translate.c |    7 +++++--
>  1 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 47daf85..849e75d 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -12768,8 +12768,11 @@ void cpu_state_reset(CPUMIPSState *env)
>  
>  #if defined(CONFIG_USER_ONLY)
>      env->hflags = MIPS_HFLAG_UM;
> -    /* Enable access to the SYNCI_Step register.  */
> -    env->CP0_HWREna |= (1 << 1);
> +    if (env->insn_flags & ISA_MIPS32R2) {
> +        /* Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR
> +           hardware registers.  */
> +        env->CP0_HWREna |= 0x0000000F;
> +    }

So what about the non-MIPS32r2 case? IIUC then the SYNCI_Step register
would no longer be accessible, which your commit message does not
mention. Intentional?

If this is a bugfix for v1.2.0 don't forget to mark "for-1.2".

Andreas

>      if (env->CP0_Config1 & (1 << CP0C1_FP)) {
>          env->hflags |= MIPS_HFLAG_FPU;
>      }
> 


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg