Re: [Qemu-devel] [PATCH 2/4] tcg/i386: Add shortcuts for registers used in L constraint

[Peter Maydell]

On 13 September 2012 22:47, Aurelien Jarno <address@hidden> wrote:
> On Thu, Sep 13, 2012 at 02:30:36PM -0700, Richard Henderson wrote:
>> On 09/13/2012 02:21 PM, Aurelien Jarno wrote:
>> >> >  #if TCG_TARGET_REG_BITS == 32
>> >> >      tcg_out_ld(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP,
>> >> >                 (ARRAY_SIZE(tcg_target_callee_save_regs) + 1) * 4);
>> >> > -    tcg_out_ld(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[1], 
>> >> > TCG_REG_ESP,
>> >> > +    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L1, TCG_REG_ESP,
>> >> >                 (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4);
>> >> >  #else
>> >> > -    tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, 
>> >> > tcg_target_call_iarg_regs[0]);
>> >> > +    tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_L0);
>> >> >  #endif
>> >> >      tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
>> >> >
>> >> >      /* jmp *tb.  */
>> >> > -    tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, 
>> >> > tcg_target_call_iarg_regs[1]);
>> >> > +    tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_L1);
>> > I don't think this is correct here. This has nothing to do with the L
>> > constraint, it's really refers to the first and seconds argument passed
>> > to the prologue.
>> >
>>
>> In the 32-bit case, our use of TCG_REG_L1 really is just a temporary.
>> We loaded it from the stack just above there.
>
> Yeah, I missed this one. This should probably be replaced directly by
> the name of the register.

That would mean you'd have to #ifdef it though, since the register you
want is "random temporary for 32 bits, but 2nd input argument register
for 64 bits". (Or you could just use TCG_REG_L1.)

>> For the 64-bit case you're right.  But that's exactly how we set up
>> the Ln macros, so I think that's ok.
>>
>
> Then we should change the name and especially the comment above it. They
> are just #define for the first argument registers, and not related to
> the 'L' constraint.

Hard to come up with a snappy name for "register which is the Nth
input argument if input args are in registers, but an arbitrary
temp reg otherwise, and which is in the forbidden list for the L
constraint"...

The alternative to that would be to pull out the 32 and 64 bit
cases rather than trying to share as much of the generation
code as we do at the moment. That might be clearer to read
but it would be a larger change.

-- PMM